DPW-LRU: An Efficient Buffer Management Policy Based on Dynamic Page Weight for Flash Memory in Cyber-Physical Systems

Abstract

Owing to its high performance, small size, and low energy consumption, NAND flash memory has been extensively adopted in cyber-physical systems. However, the inherent characteristics of flash memory, including not-in-place update and asymmetric I/O latencies, present difficulties in the design of buffer management policies. In this paper, we propose an enhanced buffer management policy for the flash memory referred to as dynamic page weight least recently used (DPW-LRU), which considers temporal locality and simultaneously provides effective utilization of limited buffer resources. Page migration is further enhanced by identifying the page access mode and frequency while separating the buffer into two different regions. A novel eviction algorithm is also designed to reduce the write operations and maintain a high hit ratio of the buffer regions, combining dynamic temporal locality, real-time eviction cost, and recency of pages. The experimental results show that DPW-LRU improves the hit ratio by up to 8.3%, decreases the write operation by up to 22.6%, and reduces the overall latency by up to 18.8% relative to those of other state-of-the-art buffers management policies. INDEX TERMS NAND flash memory, buffer management, flash translation layer, temporal locality.

GALRU: A Group-Aware Buffer Management Scheme for Flash Storage Systems

“…If the requested data are in the victim region, the GALRU performs a list sort and region migration, where this keeps the size of each region constant (lines 8-13). If the requested data do not exist in the buffer, the GALRU performs a list sort, region migration, and the eviction process, which allocates buffer entry for the requested data (lines [16][17][18][19][20][21][22][23][24][25][26][27][28]. Algorithm 2 shows the process of victim selection.…”

“…The eviction policy applied in units of the SR group can be used to overcome the limitation of current buffer management schemes. The subsections below present case studies that apply the victim selection algorithm of the GALRU to the DPW-LRU [28] and PT-LRU [22]. The impact of each case on the performance of the flash storage system is described in Section 6.…”

“…However, many buffer management schemes [15]- [28] have limitations in efficiently managing the buffer space containing clean data because the size of the unit in which the eviction process is executed is not the same as the size of the data requested by the I/O request. Buffer management schemes for flash storage systems manage the buffer space by dividing it into buffer entries, which are units of the same size as a page or a block.…”

“…In addition, when read and write requests access the same address, it difficult to efficiently manage the buffer space compared with that in the integrated structure. Buffer management schemes for integrated structures [15]- [28], [43] use the dirtiness of the data as a criterion for selecting the victim entry for the eviction process because the flash device has a write life limit and takes a long time for the write operation. To reduce the frequency of flash write operations, the CFLRU [15] contained an eviction policy based on the clean-first method, which involves selecting a clean entry over a dirty entry as the victim entry of the eviction process.…”

“…To reduce the frequency of flash write operations, the CFLRU [15] contained an eviction policy based on the clean-first method, which involves selecting a clean entry over a dirty entry as the victim entry of the eviction process. Many buffer management schemes [16]- [28] have since featured eviction policies based on the cleanfirst method. To improve the buffer hit ratio, they mainly use an eviction policy that integrates the clean-first method with a cold-first method.…”