Dry-etch proximity function for model-based OPC beyond 65-nm node

Sato, Shunichiro; Ozawa, Ken; Uesawa, Fumikatsu

doi:10.1117/12.657043

Cited by 10 publications

(2 citation statements)

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“…Long range loading effect, [42][43][44] microloading effect, [45][46][47] and flare in photo and extreme ultraviolet (EUV) lithography systems [48][49][50] are the notable examples. It is difficult to reduce these errors only by improving process and lithography systems.…”

Section: A2 Process Effect Correctionmentioning

confidence: 99%

Proximity Effect Correction for Mask Writing Taking Resist Development Processes into Account

Abe¹,

Matsumoto

Shibata³

et al. 2009

Jpn. J. Appl. Phys.

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In this paper, a proximity effect correction method for mask fabrication with taking into account resist development processes is proposed. The idea of our method is that the figure size of a developed resist is determined using a suitable function of exposure dose and the normalized deposited energy by backscattering electrons, under the assumption of high acceleration voltage electron beam mask writing. This suitable function should be determined empirically to include the effects of resist development process, and is called development process function in this paper. Methods of deriving the development process function, proximity effect correction equation, and optimum correction dose from the equation are proposed. To check the accuracy of our method, a sample model of development process function is introduced under the condition that the conventional threshold model has an intrinsic error of 8 nm. The method proposed in this paper is found to be able to suppress the correction error of this sample model to less than 1 and 0.2 nm by two and three iterations, respectively. The method proposed in this paper is expected to provide high accuracy proximity effect correction in future mask fabrication.

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Section: A2 Process Effect Correctionmentioning

confidence: 99%

Proximity Effect Correction for Mask Writing Taking Resist Development Processes into Account

Abe¹,

Matsumoto

Shibata³

et al. 2009

Jpn. J. Appl. Phys.

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show abstract

“…7 Sato et al demonstrated this exercise in their early work. 8 Shim and Shin describe the etch bias (EB) as, For a single etch step depicted in Fig. 1, the kernels are representative of the impact of view factors and etchable "open" area on the flux and energy that reach the feature edge and etch front, direct and indirect by-product deposition.…”

Section: Kernels and Model Based Approaches Accounting For Etchmentioning

confidence: 99%

Etch aware computational patterning in the era of atomic precision processing

Ventzek

Shinagawa

Ranjan

2019

Advanced Etch Technology for Nanopatterning VIII

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Etch processes have always involved inherent process trade-offs related to fundamental plasma parameters to achieve planar patterning metrics related to damage, aspect ratio dependences and profile. Today, we are in a new era of "area selective etch." Advanced patterning (SAXP, (LELE) n), logic, memory and interconnect applications beyond 3 nm involve, in one way or another, topographies that require etch "control" at every surface. Achieving profile specifications will require the ability to conjure isotropy control at will. Vehicles to achieving this include novel precursors and hybrid processes involving combinations of deposition and plasma etch as we know it. Ultimately, to differentiate surfaces comprising silicon, silicon oxides and nitrides, and organics require active modification at the first surface reactive monolayer to be able to differentiate them in each process step with respect to any surface normal on the wafer plane. This presentation will start with a review of today's state-of-the-art means for atomic precision processing of surfaces. A simulation science perspective to process integration modeling introduces methods for surface chemistry control that lend themselves to achieving area selective etch. In the end, surface chemistry control is not a cure-all. Finally, a combination of plasma diagnostics and simulation will be needed to assist plasma process controls for scaling at 3 nm and beyond.

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Study of etching bias modeling and correction strategies for compensation of patterning process effects

Tsai

Melvin

2013

Microelectronic Engineering

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Dry-etch proximity function for model-based OPC beyond 65-nm node

Cited by 10 publications

References 0 publications

Proximity Effect Correction for Mask Writing Taking Resist Development Processes into Account

Proximity Effect Correction for Mask Writing Taking Resist Development Processes into Account

Etch aware computational patterning in the era of atomic precision processing

Study of etching bias modeling and correction strategies for compensation of patterning process effects

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