1996
DOI: 10.1016/0167-9317(95)00175-1
|View full text |Cite
|
Sign up to set email alerts
|

Dry etching and induced damage

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
4

Citation Types

0
8
0

Year Published

1997
1997
2020
2020

Publication Types

Select...
9
1

Relationship

1
9

Authors

Journals

citations
Cited by 14 publications
(8 citation statements)
references
References 64 publications
0
8
0
Order By: Relevance
“…Process-induced damage is of great concern in reliability assurance and yield improvement of modern submicron semiconductor devices manufacturing by ultralarge-scale integration technology. [15][16][17] Considering the 1 Gbit DRAM integration, each memory cell requires a minimum of 20 fF of capacitance. However, these capacitors would suffer damage from an integration process such as etching or back-end processes.…”
Section: Introductionmentioning
confidence: 99%
“…Process-induced damage is of great concern in reliability assurance and yield improvement of modern submicron semiconductor devices manufacturing by ultralarge-scale integration technology. [15][16][17] Considering the 1 Gbit DRAM integration, each memory cell requires a minimum of 20 fF of capacitance. However, these capacitors would suffer damage from an integration process such as etching or back-end processes.…”
Section: Introductionmentioning
confidence: 99%
“…It is known that surface damage and contamination induced during dry etch patterning of semiconductors can significantly affect the properties of the material, subsequent processing, and device performance. 5,6 Therefore, in order to obtain better understanding, prediction, and even control of the properties and behavior of the fabricated devices, it is essential to characterize and investigate the surface microstructure modifications caused by dry etch processes. Although surface morphology of etched SiC has been studied, [7][8][9] there is lack of investigation on the etch products on the surface of the etched SiC, especially the variation of these etch products under different etch conditions.…”
Section: Introductionmentioning
confidence: 99%
“…Unfortunately, the large Si-C bond energy makes SiC etching very difficult, therefore the powerful plasma-based dry etching becomes the main practical way to etch SiC in the fabrication of MEMS [7] . However, the surface residues resulting from dry etching can significantly affect the properties of materials, subsequent processing and device performance [8,9] . Therefore, it is very important to develop a new method to etch SiC with high etching rate, small surface roughness and little surface residue [7] .…”
Section: Introductionmentioning
confidence: 99%