Duplicated Execution Method for NoC-based Multiple Processor Systems with Restricted Private Memories

Abstract

We propose a processor-level fault tolerance technique based on the Pair and Swap scheme to improve the dependability of network-on-chip based multiple processor systems where each processor core has its private memory. In the proposed scheme, two identical copies of a given task are executed on a pair of processor cores and the results are compared repeatedly in order to detect processor faults. We propose that each task is quadruplicated and statically assigned to private memories so that each memory has only two different tasks. We evaluate the reliability of the proposed quadruplicated task allocation method in the viewpoint of MTTF (Mean Time To Failure). As a result, the MTTF of the proposed method is over 4.3 times longer than that of the duplicated task allocation method.

Multi-chip NoCs for Automotive Applications

“…(1) Dual-core computations and comparison with core-pair reconfiguration mechanism [4] is used for tolerating a core fault. (2) A dependable routing algorithm [5], [6] is used for tolerating a router or a link fault.…”

Fault Diagnosis and Reconfiguration Method for Network-on-Chip Based Multiple Processor Systems with Restricted Private Memories

“…It is suited to our target application whose deadline period is assumed to be long enough to execute several tasks sequentially since no redundant computation and data transportation. This paper is an extended version of our conference paper [22]. The remaining part of this paper is organized as follows.…”