Dynamic $\mathrm{R}_{\mathrm{ON}}$ in $\beta$-Ga<sub>2</sub>O<sub>3</sub> MOSFET Power Devices

Moule, Taylor; Singh, Manikant; Pomeroy, James W.; Karboyan, Serge; Uren, Michael J.; Wong, Man Hoi; Kuramata, Akito; Yamakoshi, Shigenobu; Higashiwaki, Masataka; Kuball, Martin

doi:10.1109/iciprm.2019.8819296

2019 Compound Semiconductor Week (CSW) 2019

DOI: 10.1109/iciprm.2019.8819296

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Dynamic $\mathrm{R}_{\mathrm{ON}}$ in $\beta$-Ga₂O₃ MOSFET Power Devices

Taylor Moule

Manikant Singh

James W. Pomeroy

et al.

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2024

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Fabrication and characterization of modulation-doped β-(AlxGa1−x)2O3/Ga2O3 tri-metal FET utilizing ultra-high vacuum deposition based on plasma-assisted molecular beam epitaxy

Kumaran,

Venkatesh,

Mubarakali

et al. 2024

J Mater Sci: Mater Electron

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Fabrication and characterization of modulation-doped β-(AlxGa1−x)2O3/Ga2O3 tri-metal FET utilizing ultra-high vacuum deposition based on plasma-assisted molecular beam epitaxy

Kumaran,

Venkatesh,

Mubarakali

et al. 2024

J Mater Sci: Mater Electron

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Extremely Low Thermal Resistance of β-Ga₂O₃ MOSFETs by Co-integrated Design of Substrate Engineering and Device Packaging

Qu,

Xie,

Zhao

et al. 2024

ACS Appl. Mater. Interfaces

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Gallium oxide (Ga2O3) emerges as a promising ultrawide bandgap semiconductor, which is expected to surpass the performance of current wide bandgap materials, like GaN and SiC, in electronic devices. However, widespread application of Ga2O3 is hindered by its extremely low thermal conductivity and lack of effective device-level thermal management strategies. In this work, Ga2O3 metal–oxide–semiconductor field-effect transistors (MOSFETs) are fabricated by conducting co-integrated design of substrate engineering with layer transferring and device packaging. 3D Raman thermography is introduced as a novel method to analyze the temperature distribution within the device, which provides valuable insights into their thermal performances. A high-quality Ga2O3-SiC heterogeneous integrated material is successfully fabricated with an extremely low interface thermal resistance of 6.67 ± 2 m2·K/GW. Compared to the homoepitaxial Ga2O3 MOSFETs, the degradation of I on/I off in Ga2O3-SiC MOSFETs is decreased by 1.5 orders of magnitude, and that of R on is decreased by 31%, showing the great thermal stability of Ga2O3-SiC MOSFETs. With the additional device packaging, a significant one order-of-magnitude reduction in the thermal resistance of the Ga2O3-SiC MOSFET is achieved, reaching a record-low value of 4.45 K·mm/W in the reported Ga2O3 MOSFETs. This work demonstrates an efficient strategy for device-level thermal management in next-generation Ga2O3 power and RF applications.

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Dynamic $\mathrm{R}_{\mathrm{ON}}$ in $\beta$-Ga₂O₃ MOSFET Power Devices

Cited by 2 publications

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Fabrication and characterization of modulation-doped β-(AlxGa1−x)2O3/Ga2O3 tri-metal FET utilizing ultra-high vacuum deposition based on plasma-assisted molecular beam epitaxy

Fabrication and characterization of modulation-doped β-(AlxGa1−x)2O3/Ga2O3 tri-metal FET utilizing ultra-high vacuum deposition based on plasma-assisted molecular beam epitaxy

Extremely Low Thermal Resistance of β-Ga₂O₃ MOSFETs by Co-integrated Design of Substrate Engineering and Device Packaging

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Dynamic $\mathrm{R}_{\mathrm{ON}}$ in $\beta$-Ga2O3 MOSFET Power Devices

Cited by 2 publications

References 0 publications

Fabrication and characterization of modulation-doped β-(AlxGa1−x)2O3/Ga2O3 tri-metal FET utilizing ultra-high vacuum deposition based on plasma-assisted molecular beam epitaxy

Fabrication and characterization of modulation-doped β-(AlxGa1−x)2O3/Ga2O3 tri-metal FET utilizing ultra-high vacuum deposition based on plasma-assisted molecular beam epitaxy

Extremely Low Thermal Resistance of β-Ga2O3 MOSFETs by Co-integrated Design of Substrate Engineering and Device Packaging

Contact Info

Product

Resources

About

Dynamic $\mathrm{R}_{\mathrm{ON}}$ in $\beta$-Ga₂O₃ MOSFET Power Devices

Extremely Low Thermal Resistance of β-Ga₂O₃ MOSFETs by Co-integrated Design of Substrate Engineering and Device Packaging