Dynamic On-Chip Thermal Optimization for Three-Dimensional Networks-On-Chip

Al-Dujaily, Ra'ed; Mak, Terrence; Lam, K.P.; Xia, Fei; Yakovlev, Alex; Poon, Chi‐Sang

doi:10.1093/comjnl/bxs135

Cited by 4 publications

(7 citation statements)

References 27 publications

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“…In the failure mechanism models, lifetime reliability is highly related to temperature. Most prior studies consider thermal issues, with the objectives to balance the temperature or to take temperature as a constraint [2,13,23]. Mulas et al [23] employed a task migration approach to redistribute power dissipation such that the temperature of multiprocessor system is balanced.…”

Section: Related Workmentioning

confidence: 99%

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Dynamic Programming-Based Lifetime Reliability Optimization in Networks-on-Chip

Wang

Mak

2015

VLSI-SoC: Internet of Things Foundations

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International audienceTechnology scaling leads to the reliability issue as a primary concern in Networks-on-Chip (NoC) design. Due to routing algorithms, some routers may age much faster than others, which become a bottleneck for system lifetime. In this chapter, lifetime is modeled as a resource consumed over time. A metric lifetime budget is associated with each router, indicating the maximum allowed workload for current period. Since the heterogeneity in router lifetime reliability has strong correlation with the routing algorithm, we define a problem to optimize the lifetime by routing packets along the path with maximum lifetime budgets. A dynamic programming-based lifetime-aware routing algorithm is proposed to optimize the lifetime distribution of routers. The dynamic programming network approach is employed to solve this problem with linear complexity. The experimental results show that the lifetime-aware routing has around 20 %, 45 %, 55 % minimal MTTF improvement than XY routing, NoP routing, and Oddeven routing, respectively

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Section: Related Workmentioning

confidence: 99%

“…High temperature also greatly reduces the lifetime of a chip. Dynamic thermal management (DTM) techniques such as dynamic voltage and frequency scaling (DVFS) [13], adaptive routing [2] are employed to address the temperature issues. The temperature is maintained below a limit to ensure the reliability of a chip.…”

Section: Introductionmentioning

confidence: 99%

Dynamic Programming-Based Lifetime Reliability Optimization in Networks-on-Chip

Wang

Mak

2015

VLSI-SoC: Internet of Things Foundations

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“…The strategy consists of two regenerative schemes, namely, proactive and reactive control. The proactive control employs a coolest path-first (CPF) adaptive routing algorithm, similar to what has been proposed in Al-Dujaily et al [2013], which aims to reduce the probability of experiencing thermal hotspots by effectively redirecting routing loads towards the coolest paths among the available pathways. This approach can effectively and homogeneously re-distribute the on-chip heat over the entire chip at multiple layers.…”

Section: Contributionsmentioning

confidence: 99%

“…This tool enables traffic and thermal co-simulation which is used to evaluate the proposed thermal management technique. This tool has been expanded over the version proposed in our work [Al-Dujaily et al 2013]. -We evaluate the proposed methodology through experimental studies and comparisons with the state-of-the-art techniques for runtime thermal management (RTM) in NoCs using various traffic scenarios.…”

Section: Contributionsmentioning

confidence: 99%

“…The cycle-accurate NoC results and temperature variations over a discrete sampling interval are saved to a storage in the computer for data analysis and visualization. In particular, we modified the tool chain proposed in our previous work [Al-Dujaily et al 2013] to include the new proposed routing algorithms (illustrated in Figure 3) and the distributed throttling algorithm described in Algorithm 1 (Section 5.1).…”

Section: On-chip Communication Thermal Area and Power Modelingmentioning

confidence: 99%

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Dynamic programming-based runtime thermal management (DPRTM)

Al-Dujaily

Dahir

Mak

et al. 2013

ACM Trans. Des. Autom. Electron. Syst.

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Complex thermal behavior inhibits the advancement of three-dimensional (3D) very-large-scale-integration (VLSI) system designs, as it could lead to ultra-high temperature hotspots and permanent silicon device damage. This article introduces a new runtime thermal management strategy to effectively diffuse and manage heat throughout 3D chip geometry for a better throughput performance in networks on chip (NoC). This strategy employs a dynamic programming-based runtime thermal management (DPRTM) policy to provide online thermal regulation. Reactive and proactive adaptive schemes are integrated to optimize the routing pathways depending on the critical temperature thresholds and traffic developments. Also, when the critical system thermal limit is violated, an urgent throttling will take place. The proposed DPRTM is rigorously evaluated through cycle-accurate simulations, and results show that the proposed approach outperforms conventional approaches in terms of computational efficiency and thermal stability. For example, the system throughput using the DPRTM approach can be improved by 33% when compared to other adaptive routing strategies for a given thermal constraint. Moreover, the DPRTM implementation presented in this article demonstrates that the hardware overhead is insignificant. This work opens a new avenue for exploring the on-chip adaptability and thermal regulation for future large-scale and 3D many-core integrations.

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