Dynamic Thread Mapping Based on Machine Learning for Transactional Memory Applications

Castro, Márcio; Góes, Luís F. W.; Fernandes, Luiz Gustavo; Jean-Fran$#,; Méhaut, ois

doi:10.1007/978-3-642-32820-6_47

Cited by 12 publications

(12 citation statements)

References 6 publications

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“…Approaches such as [16,56,60,61,102,103] focus on features collected dynamically during program execution, such as, estimated execution time determined through analysis of profiling data, information related to tasks (arrival time, number of currently running tasks). Whereas other approaches combine static features collected at compile-time with dynamic ones collected at run-time [30,43,[74][75][76], program input parameters, and hardware related information [11,24,41,54,80].…”

Section: Rq3: Considered Features During Run-time Dynamic Schedulingmentioning

confidence: 99%

Using meta-heuristics and machine learning for software optimization of parallel computing systems: a systematic literature review

et al. 2018

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While modern parallel computing systems offer high performance, utilizing these powerful computing resources to the highest possible extent demands advanced knowledge of various hardware architectures and parallel programming models. Furthermore, optimized software execution on parallel computing systems demands consideration of many parameters at compile-time and run-time. Determining the optimal set of parameters in a given execution context is a complex task, and therefore to address this issue researchers have proposed different approaches that use heuristic search or machine learning. In this paper, we undertake a systematic literature review to aggregate, analyze and classify the existing software optimization methods for parallel computing systems. We review approaches that use machine learning or meta-heuristics for software optimization at compile-time and run-time. we discuss challenges and future research directions. The results of this study may help to better understand the state-of-the-art techniques that use machine learning and meta-heuristics to deal with the complexity of software optimization for parallel computing systems. Furthermore, it may aid in understanding the limitations of existing approaches and identification of areas for improvement.

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Section: Rq3: Considered Features During Run-time Dynamic Schedulingmentioning

confidence: 99%

Using meta-heuristics and machine learning for software optimization of parallel computing systems: a systematic literature review

et al. 2018

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“…Several proposals present techniques to statically collect the communication pattern of the threads of parallel applications based on shared memory [5,6]. A similar mechanism exists for applications that use software transactional memory [13], Radojkovic et al [8] select the best mapping by measuring the performance that each mapping obtained. The application is then executed with static mappings based on the detected patterns.…”

Section: Related Workmentioning

confidence: 99%

“…We also developed a heuristic mapping algorithm that uses the detected pattern to dynamically map the threads to cores. A similar mechanism exists for applications that use software transactional memory [13], Radojkovic et al [8] select the best mapping by measuring the performance that each mapping obtained. Results show that our mechanism can substantially improve parallel application performance, as well as processor and DRAM energy consumption.…”

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confidence: 99%

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Communication‐aware thread mapping using the translation lookaside buffer

Cruz

Diener

Navaux

2015

Concurrency and Computation

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Threads of parallel applications need to communicate in order to fulfill their tasks. The communication performance between the cores in modern multi-core architectures differs because of the memory and interconnection hierarchies. In these architectures, it is important to map the threads of parallel applications by taking into account the communication between them, to improve their performance and energy consumption. In parallel applications based on shared memory, communication is implicit, which makes it difficult to detect the communication pattern between the threads.In this paper, we introduce a new lightweight mechanism to detect the communication pattern between threads of shared memory applications using the translation lookaside buffer. Our mechanism relies on hardware features, which make it transparent to the programmer and allow the detection to be performed by the operating system during the execution of the application. We also developed a heuristic mapping algorithm that uses the detected pattern to dynamically map the threads to cores. Experiments were performed with applications from the NAS-OMP and PARSEC parallel benchmark suites in a simulated machine as well as a real machine. Results show that our mechanism can substantially improve parallel application performance, as well as processor and DRAM energy consumption. COMMUNICATION-AWARE THREAD MAPPING USING THE TRANSLATION LOOKASIDE BUFFER 4971 replicated cache lines optimizes the usage of the caches [4] and also reduces the amount of invalidation messages sent by cache coherence protocols. Furthermore, mapping threads according to the communication can reduce energy consumption, because each coherence and cache line transfer message between the caches increases the amount of energy used by the interconnections.Communication-aware mapping requires a method to detect the communication between the threads and algorithms that use this information to perform the mapping of threads to cores. In shared memory architectures, detecting the communication between threads presents challenges, because the communication is implicit and happens through memory accesses to shared variables. Most previous research in this area focuses on static profiling methods to provide information for the mapping [5,6], which usually present a high overhead and cannot be used in case the application's behavior changes between executions. Dynamic methods were also proposed, but with several disadvantages, such as low accuracy [7,8], the need to modify the source code of the applications [9] or parallelization libraries, or they are limited to specific processor architectures [10].In this paper, we propose a new lightweight, dynamic mechanism to detect the communication patterns of parallel applications based on shared memory. Our approach consists of looking at the most recently accessed virtual memory pages by each core. This is carried out by checking the contents of the translation lookaside buffer (TLB), which performs the translation of virtual addresses to physical...

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“…In this context, Transactional Memory (TM) provides a new attractive way of developing parallel applications through a higher abstraction level, shifting the synchronization problem to the TM system, which is responsible for ensuring that deadlocks will not occur and race conditions are correctly handled [2], [3]. It allows programmers to write parallel code as transactions, which are guaranteed to execute atomically and in isolation regardless of eventual data races [1].…”

Section: Introductionmentioning

confidence: 99%

Evaluating the Impact of Transactional Characteristics on the Performance of Transactional Memory Applications

Rui

Castro

Griebler

et al. 2014

2014 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing

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Transactional Memory (TM) is reputed by many researchers to be a promising solution to ease parallel programming on multicore processors. This model provides the scalability of fine-grained locking while avoiding common issues of traditional mechanisms, such as deadlocks. During these almost twenty years of research, several TM systems and benchmarks have been proposed. However, TM is not yet widely adopted by the scientific community to develop parallel applications due to unanswered questions in the literature, such as "how to identify if a parallel application can exploit TM to achieve better performance?" or "what are the reasons of poor performances of some TM applications?". In this work, we contribute to answer those questions through a comparative evaluation of a set of TM applications on four different stateof-the-art TM systems. Moreover, we identify some of the most important TM characteristics that impact directly the performance of TM applications. Our results can be useful to identify opportunities for optimizations.

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Dynamic Thread Mapping Based on Machine Learning for Transactional Memory Applications

Cited by 12 publications

References 6 publications

Using meta-heuristics and machine learning for software optimization of parallel computing systems: a systematic literature review

Using meta-heuristics and machine learning for software optimization of parallel computing systems: a systematic literature review

Communication‐aware thread mapping using the translation lookaside buffer

Evaluating the Impact of Transactional Characteristics on the Performance of Transactional Memory Applications

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