Dynamic voltage and frequency scaling for shared resources in multicore processor designs

Chen, Xi; Xu, Zheng; Kim, Hyungjun; Gratz, Paul V.; Hu, Jiang; Kishinevsky, Michael; Ogras, Ümit Y.; Ayoub, Raid

doi:10.1145/2463209.2488874

Cited by 58 publications

(28 citation statements)

References 13 publications

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“…They also developed a design exploration framework allowing us to evaluate several possible trade-offs between power consumption and reliability. Chen et al presented a method for dynamic voltage/frequency scaling of networks-on-chip and last level caches in multicore processor designs, where the shared resources form a single voltage/frequency domain in [12]. These techniques reduce energy delay product by 56% compared to a state-of-the-art prior work.…”

Section: Optimization Of Energy Consumption In Cloud Datamentioning

confidence: 99%

Ant Colony Optimization Algorithm to Dynamic Energy Management in Cloud Data Center

Pang

Zhang

et al. 2017

Mathematical Problems in Engineering

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With the wide deployment of cloud computing data centers, the problems of power consumption have become increasingly prominent. The dynamic energy management problem in pursuit of energy-efficiency in cloud data centers is investigated. Specifically, a dynamic energy management system model for cloud data centers is built, and this system is composed of DVS Management Module, Load Balancing Module, and Task Scheduling Module. According to Task Scheduling Module, the scheduling process is analyzed by Stochastic Petri Net, and a task-oriented resource allocation method (LET-ACO) is proposed, which optimizes the running time of the system and the energy consumption by scheduling tasks. Simulation studies confirm the effectiveness of the proposed system model. And the simulation results also show that, compared to ACO, Min-Min, and RR scheduling strategy, the proposed LET-ACO method can save up to 28%, 31%, and 40% energy consumption while meeting performance constraints.

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Section: Optimization Of Energy Consumption In Cloud Datamentioning

confidence: 99%

Ant Colony Optimization Algorithm to Dynamic Energy Management in Cloud Data Center

Pang

Zhang

et al. 2017

Mathematical Problems in Engineering

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“…[12] presented a frequency and voltage scaling method based on the network workload. Another systemlevel DVFS technique is presented in [1] where higher level caches are comprised as well as network resources. Bogdan et al [2], [4] present a control approach for NoC designs with multiple voltage and frequency islands.…”

Section: IImentioning

confidence: 99%

“…To prevent the hardware from destruction, hardware monitors are included in the chips and switch off the device before it comes to actual damage. For taking corrective actions even before the heat increases too much, dynamic voltage and frequency scaling (DVFS) methods are applied [1]. The majority of DVFS methods focuses on the processor perspective and the communication is not considered.…”

Section: Introductionmentioning

confidence: 99%

Network on Chip Router with Power Management Unit for Improved Network Fabric Power Efficiency

2017

IJRTER

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Abstract-Growing chip integration density and increasing frequencies lead to tremendous leakage power and henceforth to chip heat problems. Power management is one possibility to reduce the power consumption and get the temperature problem under control. Current technology mainly focuses on power-gating techniques on basis of multi-core systems but leaving the network perspective out of scope. We provide a holistic concept, bringing together voltage and frequency scaling techniques for network-on-chips. Following this, network static power consumption could be minimized without affecting the system performance. We present a light-weight power management controller for network-on-chips with online monitoring to optimize the power consumption of network resources. Our work comprises a hardware simulation model for design space exploration of varying technology specific parameters and an FPGA based prototype for verification. The power saving poten-tial heavily depend on the network communication load.

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“…[12] presented a frequency and voltage scaling method based on the network workload. Another system-level DVFS technique is presented in [1] where higher level caches are comprised as well as network resources. Bogdan et al [2], [4] present a control approach for NoC designs with multiple voltage and frequency islands.…”

Section: Related Workmentioning

confidence: 99%

Noc Router With Dedicated Power Management Unit

Khanooni¹

2017

IJRASET

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Growing chip integration density and increasing frequencies lead to tremendous leakage power and henceforth to chip heat problems. Power management is one possibility to reduce the power consumption and get the temperature problem under control. Current technology mainly focuses on power-gating techniques on basis of multi-core systems but leaving the network perspective out of scope. We provide a holistic concept, bringing together voltage and frequency scaling techniques for networkon-chips. Following this, network static power consumption could be minimized without affecting the system performance. We present a light-weight power manages-ment controller for network-on-chips with online monitoring to optimize the power consumption of network resources. Our work comprises a hardware simulation model for design space exploration of varying technology specific parameters and an FPGA based prototype for verification. The power saving potent-tial heavily depend on the network communication load. Keywords-network-on-chip, router, power management, voltage scaling, frequency scaling, clock gating, power gating I.INTRODUCTION Network-on-chips (NoCs) provide a scalable communication infrastructure for architectures with huge numbers of process-ing elements. To preclude that communication becomes the bottleneck in large multiprocessor designs, powerful network routers with large throughput are necessary. Consequently the proportion of network resources of the overall resource consumption is not negligible any longer. Since the start of CPU development, processor frequency increased from few Megahertz to around three Gigahertz. However, in the last few years, core frequency growth has slowed. One of the reasons is a highly significant heat emission which comes in conjunction with increasing frequencies. Chip temperature can increase so much that it could cause actual physical damage to the chip. Because of the tremendous generated heat, simple cooling mechanisms are no longer strong enough to carry away the heat. To prevent the hardware from destruction, hardware monitors are included in the chips and switch off the device before it comes to actual damage. For taking corrective actions even before the heat increases too much, dynamic voltage and frequency scaling (DVFS) methods are applied [1]. The majority of DVFS methods focuses on the processor perspective and the communication is not considered. However, there are first developments to extend these methods also to the network layer [2], [3], [4].With shrinking technology sizes, especially beyond 90nm, the amount of static power dissipation reaches a critical proportion of the total power. Accessory, the increasing static power dissipation causes high temperatures even in idle cir-cutis and hence the static leakage is not negligible any more. The rising complexity of on-chip communication structures, is reaching a state where dedicated power management becomes beneficial. Moreover, with increasing network sizes it will not be possible to have one globally sy...

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Dynamic voltage and frequency scaling for shared resources in multicore processor designs

Cited by 58 publications

References 13 publications

Ant Colony Optimization Algorithm to Dynamic Energy Management in Cloud Data Center

Ant Colony Optimization Algorithm to Dynamic Energy Management in Cloud Data Center

Network on Chip Router with Power Management Unit for Improved Network Fabric Power Efficiency

Noc Router With Dedicated Power Management Unit

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