Dynamic voltage scaling for multitasking real-time systems with uncertain execution time

Abstract

Dynamic voltage scaling (DVS) for real-time systems has been extensively studied to save energy. Previous studies consider the probabilistic distributions of tasks' execution time to assist DVS in task scheduling. These studies use probability information for intra-task frequency scheduling but do not sufficiently explore the opportunities for intertask scheduling to save more energy. This paper presents a new approach to integrate intra-task and inter-task frequency scheduling for better energy savings in hard realtime systems with uncertain task execution time. Our approach has two steps: (a) We calculate statistically optimal frequency schedules for multiple periodic tasks using earliest deadline first (EDF) scheduling for processors that can change frequencies continuously. (b) For processors with a limited range of discrete frequencies, we further present a heuristic algorithm to construct frequency schedules. Our evaluation shows that our approach saves up to 23% more energy than existing solutions.

Energy-Aware Real-Time Task Scheduling in Multiprocessor Systems Using a Hybrid Genetic Algorithm

“…An approach for dynamically changing workload that integrates the DVS scheduler and a feedback controller within the earliest dead-line first scheduling algorithm is proposed in [11]. Hard real-time systems with uncertain task execution time are studied in [12]. The authors combine intra-and inter-task voltage scheduling to reduce power consumption.…”

“…The processor power model used in this study has been widely used in the literature [1][2][3]12,22,27]. In this study, we assume a DVS-enabled multi-processor system with M processors {p 1 , p 2 , .…”

Energy-Aware Task Scheduling for Real-Time Systems with Discrete Frequencies

“…Since the static power consumption is a constant, the power consumption function P( f i ) could be rescaled by substituting P i , while not affecting the analysis results. Distinct from many previous work [8], [10], [14], [15], [17] which assumes P( f i ) = f α i (α > 2), this paper can cope with P( f i ) as an arbitrary function.…”

“…We experiment with 20 frame lengths chosen evenly from 5×WCEC f M (no slack) to 5×WCEC f 1 . 4 DVS schemes, (1) GRACE with ρ = 0.95 [11], (2) RE-CURE [17], (3) GREEDY [18] and (4) GLOBAL with δ = 0.5, are evaluated. GRACE and RECURE are two typical schemes extended from PACE [9] using different methods to cope with processors with discrete frequencies.…”

“…However, processors, now, can only provide discrete frequencies. Xian and Lu [17] and Xu et al [15] deal with this problem by applying the research result from Ishihara and Yasuura [21] which uses two adjacent frequencies to execute task. Berten et al [19] also present a technique to adapt a continuous-speed-based method to a discrete-speed system.…”