Dynamical System Guided Mapping of Quantitative Neuronal Models Onto Neuromorphic Hardware

Gao, Peiran; Benjamin, Ben Varkey; Boahen, Kwabena

doi:10.1109/tcsi.2012.2188956

Cited by 36 publications

(22 citation statements)

References 39 publications

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“…In addition to reversing its effect when the membrane potential crosses the reversal potential, our superposable synapse circuit captures a synaptic population's dynamic behavior through its programmable rise time, decay constant, and saturation value. We proved analytically that the QIF neuron's f (g syn ) curve is nonmonotonic-unlike its f (i) curve [9], [13]-and confirmed that silicon neurons driven by our new silicon synapse displayed this behavior. Finally, we demonstrated that the silicon synapse synchronizes silicon neurons most robustly when it is shunting, confirming that reversal potentials can have important implications at the network-level.…”

Section: Discussionsupporting

confidence: 69%

“…This approach resulted in a heterogenous implementation of the model whose median parameter values matched the specified values but whose variance was determined by device mismatch [13]. For instance, all neurons received a lognormally distributed tonic current with median i in = 0.6 and CV = 22.5% (standard deviation/mean) [13]. This degree of heterogeneity is significantly higher than the previous study's, whose tonic current was normally distributed with CV = 10% [12].…”

Section: Synchronymentioning

confidence: 93%

“…Their values are determined either from the device dimensions or through a calibration procedure (similar to [13]); the latter yields more accurate results. Equating Eq 1's neuronal parameters to Eq 2's coefficients yields I erev = e rev I lk /p erev and I G4 = g syn I lk /p gsyn This model-circuit mapping enables us to program the bias currents appropriately.…”

Section: Synapse Circuitmentioning

confidence: 99%

“…The model's parameters were mapped onto the chip's single set of circuit biases using its silicon neurons' and synapses' median mapping parameters. This approach resulted in a heterogenous implementation of the model whose median parameter values matched the specified values but whose variance was determined by device mismatch [13]. For instance, all neurons received a lognormally distributed tonic current with median i in = 0.6 and CV = 22.5% (standard deviation/mean) [13].…”

Section: Synchronymentioning

confidence: 99%

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A superposable silicon synapse with programmable reversal potential

Benjamin

Arthur²,

Gao³

et al. 2012

2012 Annual International Conference of the IEEE Engineering in Medicine and Biology Society

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Abstract-We present a novel log-domain silicon synapse designed for subthreshold analog operation that emulates common synaptic interactions found in biology. Our circuit models the dynamic gating of ion-channel conductances by emulating the processes of neurotransmitter release-reuptake and receptor binding-unbinding in a superposable fashion: Only a single circuit is required to model the entire population of synapses (of a given type) that a biological neuron receives. Unlike previous designs, which are strictly excitatory or inhibitory, our silicon synapse implements-for the first time in the log-domain-a programmable reversal potential (i.e., driving force). To demonstrate our design's scalability, we fabricated in 180nm CMOS an array of 64K silicon neurons, each with four independent superposable synapse circuits occupying 11.0×21.5 µm 2 apiece. After verifying that these synapses have the predicted effect on the neurons' spike rate, we explored a recurrent network where the synapses' reversal potentials are set near the neurons' threshold, acting as shunts. These shunting synapses synchronized neuronal spiking more robustly than nonshunting synapses, confirming that reversal potentials can have important network-level implications. I. LOG-DOMAIN NEURONS AND SYNAPSESNeuromorphic engineering aims to emulate computations carried out in the nervous system by mimicking neurons and their interconnectivity in VLSI hardware [1]. Having succeeded in morphing visual and auditory sensory systems into mixed-analog-digital circuits, engineers are entering the arena of cortical modeling [2], [3], [4]; an arena in which neuromorphic systems' parallel operation and low energy consumption give them distinct advantages over software simulation. The neuron model of choice for large-scale cortical simulations [5], the quadratic integrate-and-fire (QIF) neuron, has been implemented successfully with log-domain circuits [6], [7], [8], [9]. The corresponding synapse model, a conductance tied to a programmable reversal potential, is however yet to be fully implemented in the log-domain.Existing log-domain conductance-based silicon synapse designs are either purely excitatory or purely inhibitory [6], [10], [11]. In contrast, biological synapses behave like a conductance that drives the membrane toward a fixed voltagethe reversal potential-that can be excitatory (much higher), inhibitory (much lower), or shunting (near the membrane's spike threshold). Shunting synapses have been shown to synchronize a heterogeneous population of neurons more robustly by slowing down those that spike too fast and speeding up those that fire too slowly [12]. To remedy the deficiency in existing log-domain silicon synapse designs, we developed a new silicon synapse by adding a reversal-potential subcircuit to our previous design [6]. In this paper, we present the synapse's design and test results (Section II), theoretically predict and verify its effect on the QIF neuron's spike rate (Section III), and confirm that the highest degree of synchrony is...

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Section: Discussionsupporting

confidence: 69%

Section: Synchronymentioning

confidence: 93%

Section: Synapse Circuitmentioning

confidence: 99%

Section: Synchronymentioning

confidence: 99%

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A superposable silicon synapse with programmable reversal potential

Benjamin

Arthur²,

Gao³

et al. 2012

2012 Annual International Conference of the IEEE Engineering in Medicine and Biology Society

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“…weighted connections). Our analog computational units are spiking silicon neurons [5]; our digital communication fabric is a packet-switched …”

mentioning

confidence: 99%

Silicon Neurons That Compute

Choudhary

Sloan

Fok

et al. 2012

Lecture Notes in Computer Science

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Abstract. We use neuromorphic chips to perform arbitrary mathematical computations for the first time. Static and dynamic computations are realized with heterogeneous spiking silicon neurons by programming their weighted connections. Using 4K neurons with 16M feed-forward or recurrent synaptic connections, formed by 256K local arbors, we communicate a scalar stimulus, quadratically transform its value, and compute its time integral. Our approach provides a promising alternative for extremely power-constrained embedded controllers, such as fully implantable neuroprosthetic decoders. Keywords: Neuromorphic chips, Silicon neurons, Probabilisitic synapses 1 Brain-Inspired Analog-Digital SystemsAnalog computation promises extreme energy-efficiency by operating close to the shot-noise limit [1]. By exploiting physical laws (e.g., conservation of charge for summation), a handful of analog devices is sufficient to perform computation. In contrast, digital computation relies on abstractions that require many more devices to achieve the same function (e.g., hundreds of transistors to add two 8-bit numbers). Furthermore, these abstractions break when noise exceeds a critical level, requiring enormous noise margins to avoid catastrophic failures. In contrast, analog degrades gracefully, allowing for operation at low noise margins, thereby saving power.However, robust and programmable computation using noisy analog circuits is challenging. Robust computation requires a distributed approach, but this is difficult because analog communication is susceptible to heterogeneity and noise. Programmable computation requires flexibility, but this is also difficult because analog computation exploits the underlying devices' fixed physical properties.In this paper, we realize robust and programmable mathematical computations with noisy and heterogeneous components using a framework inspired by the brain [2]. The brain uses graded dendritic potentials (cf. analog computation), all-or-none axonal spikes (cf. digital communication) and probabilistic synapses (cf. weighted connections). Our analog computational units are spiking silicon neurons [5]; our digital communication fabric is a packet-switched

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