E-AHRW: An Energy-Efficient Adaptive Hash Scheduler for Stream Processing on Multi-core Servers

Kuang, Jilong; Bhuyan, Laxmi N.; Xie, Haiyong; Guo, Danhua

doi:10.1109/ancs.2011.15

Cited by 7 publications

(8 citation statements)

References 29 publications

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“…RELATED WORK The problem of managing processing workloads on network processors, which use a large number of embedded cores, has been studied extensively. Examples include the work by Kuang et al who have developed a number of different scheduling techniques for network processors that aim at optimizing throughput and reducing power consumption [4]- [6]. Wu and Wolf use runtime monitoring information to determine the optimal level of parallelism for each processing task [7], [8].…”

Section: Introductionmentioning

confidence: 99%

External monitoring of highly parallel network processors

Chen

Chasaki

Wolf

2013

2013 IEEE 14th International Conference on High Performance Switching and Routing (HPSR)

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Modern routers use high-performance multi-core packet processing systems to implement protocol operations and to forward traffic. As the diversity of protocols and the number of processor cores increases, it becomes increasingly difficult to manage these systems and ensure their correct operation at runtime. In particular, it is challenging to identify situations in which a part of processor cores behave incorrectly, either due to failure or due to malicious attacks. To address this problem, we present a novel approach to verifying correct operation of a packet processor by analyzing packet latency and throughput. This approach can treat the network processor as a "black box" and does not need to observe internal functionality. We show that processing time statistics are affected by system misbehavior and present an analytic model to quantify these effects. Our results show that the presented technique is an effective approach to provide an extra level of protection to packet processor systems. I. INTRODUCTIONComputer networks continue to increase in their size, diversity, and complexity. New protocols (e.g., IPv6 [1], etc.) and novel communication paradigms (e.g., content-addressable networks [2], etc.) need to be deployed for improved network operation and to support emerging applications. To meet these demands, the networking infrastructure components -specifically routers -need to be sufficiently adaptable. The use of programmable network processors in router systems allows for changes in packet processing functionality through software rather than requiring changes in hardware.To meet the performance requirements of modern networks, where link speeds exceed tens of Gigabits per second, network processor (NP) designs are based on highly parallel embedded multi-core architectures. These processor cores are powerful enough to perform packet processing operations independently, but they are not equipped to run a complex operating system. Typically, a control processor manages the processing tasks that are implemented on the multiple data path processor cores.Current network processors use dozens to hundreds of parallel cores (e.g., Cavium's Octeon III has 48 cores, AlcatelLucent's FP3 has 288 cores). One of the key operational challenges for such systems is workload management to meet targets for throughput performance, power consumption, etc. With the emergence of network virtualization [3], it is expected

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Section: Introductionmentioning

confidence: 99%

External monitoring of highly parallel network processors

Chen

Chasaki

Wolf

2013

2013 IEEE 14th International Conference on High Performance Switching and Routing (HPSR)

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“…The authors further extracted the network traffic characteristic and unleashed the power of packet schedulers with fine-grained balancing method. Compared to CRC and other hash functions, highest random weight (HRW) hashing stands out due to the characteristics like theoreticallyproven good data locality, flow-level load balancing, minimal disruption and low overhead [10], [17]- [19]. Kuang et al [10] proposed E-AHRW, which was based on the adaptive HRW schemes.…”

Section: Related Workmentioning

confidence: 99%

“…Compared to CRC and other hash functions, highest random weight (HRW) hashing stands out due to the characteristics like theoreticallyproven good data locality, flow-level load balancing, minimal disruption and low overhead [10], [17]- [19]. Kuang et al [10] proposed E-AHRW, which was based on the adaptive HRW schemes. E-AHRW achieved both stream locality and load balancing at flow and packet level by adaptively adjusting the hashing decisions according to the real-time weighted queue length of each processing unit.…”

Section: Related Workmentioning

confidence: 99%

“…Scheduling packets for cache affinity and balancing the workload evenly are both taken into account in studies. To get rid of the overhead of locking and make the best of the superiority of data locality, flow-based packet scheduler is always an efficient choice in network processors [10]- [12]. Nelms et al [13] explored the packet scheduling algorithm for DPI with the goal of maximizing throughput and minimizing latency and concluded that scheduling packets for cache affinity was more important than balancing the workload evenly.…”

Section: Related Workmentioning

confidence: 99%

“…Inspired by E-AHRW [10], we introduce an adaptive hash function in heavily-loaded situations. The weight function γ can be depicted as:…”

Section: Algorithm 1 Paps Algorithmmentioning

confidence: 99%

See 2 more Smart Citations

Protocol-Aware Packet Scheduling Algorithm for Multi-Protocol Processing in Multi-Core MPL Architecture

Zhang

Wang

Sheng

et al. 2017

IEICE Trans. Inf. & Syst.

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SUMMARYCache affinity has been proved to have great impact on the performance of packet processing applications on multi-core platforms. Flow-based packet scheduling can make the best of data cache affinity with flow associated data and context structures. However, little work on packet scheduling algorithms has been conducted when it comes to instruction cache (I-Cache) affinity in modified pipelining (MPL) architecture for multi-core systems. In this paper, we propose a protocol-aware packet scheduling (PAPS) algorithm aiming at maximizing I-Cache affinity at protocol dependent stages in MPL architecture for multi-protocol processing (MPP) scenario. The characteristics of applications in MPL are analyzed and a mapping model is introduced to illustrate the procedure of MPP. Besides, a stage processing time model for MPL is presented based on the analysis of multi-core cache hierarchy. PAPS is a kind of flowbased packet scheduling algorithm and it schedules flows in consideration of both application-level protocol of flows and load balancing. Experiments demonstrate that PAPS outperforms the Round Robin algorithm and the HRW-based (HRW) algorithm for MPP applications. In particular, PAPS can eliminate all I-Cache misses at protocol dependent stage and reduce the average CPU cycle consumption per packet by more than 10% in comparison with HRW.

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