e-Infrastructure Support for nanoCMOS Device and Circuit Simulations

Abstract

The UK e-Science EPSRC pilot project Meeting the Design Challenges of nanoCMOS Electronics (nanoCMOS -www.nanocmos.ac.uk) was funded to address the challenges facing the global electronics semiconductor industry caused by the decreasing size of Complementary Metal Oxide Semiconductor (CMOS) transistors and the atomic variability present in devices manifest at these dimensions. Fundamental problems to be addressed include the modelling, understanding and predicting the effect of differences in the atomic structure of devices on their behaviour, and then using this information to guide electronic circuit and system designers who utilise CMOS components. In this paper we describe the e-Infrastructure that has been developed as part of the nanoCMOS project and outline how it supports large scale high performance computing (HPC) simulations of ensembles of devices which can subsequently be used to model and understand the impact that they have on very large electronic circuits. Key features of this e-Infrastructure include support for very large scale HPC utilization; dealing with federated data sets and associated metadata from multi-level simulations, and addressing challenges related to security and intellectual property protection of data, simulation codes and electronic designs as a whole.

Linking Authenticating and Authorising Infrastructures in the UK NGI (SARoNGS)

“…The ngs.ac.uk VO is an infrastructural level VO designed to serve as a catchall VO 23 for access to resources on the UK's National Grid Service. To date it has served as the primary VO for access to the NGS resources.…”

“…By bringing the discrepancies between grid and other communities to light, we hope that all communities can work towards a common understanding of identity and authority. 23 The possibility for constructing an hierarchical VO representing an array of VOs exists: membership to one VO providing the registration requirements of the next. This would allow for VOs to form and allow access to be granted in a more scalable authorisation infrastructure.…”

“…24 We have come across IdPs which release only that a login has occurred but release no further details about the individual in question. 25 Experiences gathered during an earlier EPSRC project, "Meeting the design challenges of nanoCMOS technology" [23], where participating institutions IdPs were expected to release project related roles: a delegation of authority which would require formal agreement and process. The best an institute could do, would have been to provide assertions that a researcher was formally assigned to that project.…”