ECOS A Generic Codesign Environment for the Prototyping of Real Time Applications “From Formal Specifications to Hardware-Software Partitioning”

Aiguier, Marc; Benzakki, Judith; Bernot, Gilles; Beroff, S.; Dupont, D.; Freund, L.; Israel, M.; Rousseau, Frédéric

doi:10.1007/978-1-4757-2629-9_2

Cited by 6 publications

(1 citation statement)

References 2 publications

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“…In this sense, not only functional models can be validated but models with electronic details like physical and timing features [23] must be validated as well. In this way, estimations about consumed silicon area, hardware response time, occupied program memory, and software execution time can be made in order to calculate a cost function for each functional block.…”

Section: Introductionmentioning

confidence: 99%

Design of a Master Device for the Multifunction Vehicle Bus

Jiménez

Martin

Bidarte

et al. 2007

IEEE Trans. Veh. Technol.

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This paper presents the design of a network master device for the multifunction vehicle bus. An analysis of the specifications for this bus administrator reveals that the functional design can be arranged in 14 operational blocks and in a special memory for communication data known as the Traffic Store. System-on-a-chip strategies have been adopted in order to cope with this great complexity. The architecture includes a standard on-chip bus, which is aimed at interconnecting all the modules as cores attached to it by an established interface. In this way, creation flow can be concurrent, and design for reuse is made easier. The entire architecture has been coded in SystemC not only for verification purposes but also for setting the intermediate point in the refinement process toward the register transfer-level design. After validating this executable description by simulation, the hardware/software partition has been performed following the codesign philosophy. Estimations about consumed silicon area, hardware response time, occupied program memory, and software execution time have been made in order to calculate a cost function for each functional block: the cost-performance difference. From these, an optimum hardware/software architecture has been obtained. As a result, the electronic platform for the master device has been generated on a field-programmable gate array. The final implementation contains a soft processor as the main component, a ROM, a RAM, some internal registers, and the Traffic Store.Index Terms-Design methodology, logic design, rail transportation electronics, train communication network (TCN).

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Section: Introductionmentioning

confidence: 99%

Design of a Master Device for the Multifunction Vehicle Bus

Jiménez

Martin

Bidarte

et al. 2007

IEEE Trans. Veh. Technol.

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Hardware-software timing coverification of concurrent embedded real-time systems

Hsiung

2000

IEE Proc., Comput. Digit. Tech.

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Hardware-software coverification of concurrent embedded real-time systems

Hsiung

Proceedings of 11th Euromicro Conference on Real-Time Systems. Euromicro RTS'99

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Hardware-software codesign results of c~ncurrcnt embedded realtime systems are often not easily verifiable. The main difficulty lies in-the different time-scales df the embedded hardware, of thk embedded software, and of the environment. This rate difference cawes state-space explosions and hence coverification has been mostly restricted t0 the initial system specifications. Currently, most codesign tools or methodologies only support validation in the form of cosimulation and testing. Here, we propose a new formal coverification method based on linear hybrid automam. The basic problems found in nm~t coveritication tasks are presented and solved. For complex systems, a simplification strategy is proposed to attack state-space explosions in formal covedtication. Experimental results show the feasibility of our approach and the increase in verification scalability through the application of the proposed method.

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ECOS A Generic Codesign Environment for the Prototyping of Real Time Applications “From Formal Specifications to Hardware-Software Partitioning”

Cited by 6 publications

References 2 publications

Design of a Master Device for the Multifunction Vehicle Bus

Design of a Master Device for the Multifunction Vehicle Bus

Hardware-software timing coverification of concurrent embedded real-time systems

Hardware-software coverification of concurrent embedded real-time systems

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