Edge Couplers With Relaxed Alignment Tolerance for Pick-and-Place Hybrid Integration of III–V Lasers With SOI Waveguides

Abstract

We report on two edge-coupling and power splitting devices for hybrid integration of III-V lasers with sub-micrometric silicon-on-insulator waveguides. The proposed devices relax the horizontal alignment tolerances required to achieve high coupling efficiencies and are suitable for passively aligned assembly with pick-and-place tools. Light is coupled to two on-chip single mode SOI waveguides with almost identical power coupling efficiency, but with a varying relative phase accommodating the lateral misalignment between the laser diode and the coupling devices, and is suitable for the implementation of parallel optics transmitters. Experimental characterization with both a lensed fiber and a Fabry-Pérot semiconductor laser diode has been performed. Excess insertion losses (in addition to the 3 dB splitting) taken as the worst case over both waveguides of respectively 2 ± 0.3 dB and 3.1 ± 0.3 dB, as well as excellent 1 dB loss placement tolerance range of respectively 2.8 μm and 3.8 μm (worst case over both in-plane axes) have been measured for the two devices. Back-reflections to the laser are below -20 dB for both devices within the 1 dB misalignment range. Devices were fabricated with 193 nm DUV optical lithography and are compatible with mass-manufacturing with mainstream CMOS technology.

Photonic Packaging: Transforming Silicon Photonic Integrated Circuits into Photonic Devices

“…A number of research groups and companies are working to develop schemes that reduce the alignment tolerance of edge-coupling [21,22]. The aim is to relax the alignment tolerance (or strengthen the fabrication tolerance [23]) to a level that supports multi-channel edge-coupling for telecom and datacom applications.…”

“…High-speed SMA (18)(19)(20)(21)(22)(23)(24)(25) and SMK (46 GHz) connectors have a ≈1 cm 2 footprint on the PCB, while the pitch of the electrical bond-pads on a PIC is typically 100 μm. Therefore, the pitch of the high-speed 50 Ω transmission lines must be reduced by two orders-of-magnitude between the connector and the PIC, while maintaining the path-length of different electrical-channels to preserve signal timings.…”

Passively biased resonantly enhanced silicon photonics modulator with high optical bandwidth

“…Moreover, lateral displacements of the input light source over a large range do not significantly penalize Insertion Losses (ILs) or splitting imbalance. Thus, multimode couplers have been proposed to relax the alignment tolerances for efficient fiber-to-chip coupling with a demonstrated three-fold improvement in comparison with conventional single mode couplers 9,13 . In a MMGC, the input displacement is converted into a relative phase shift between the outputs.…”

Fiber-chip edge coupler with large mode size for silicon photonic wire waveguides

“…In fact, the mode leakage to the substrate through the BOX layer is the main obstacle to achieving large mode sizes. A limited mode size is a disadvantage since lensed fibers are required for high coupling efficiencies and precise (sub-micron) fiber-chip alignment is demanded [11,12]. An inverse taper structure with a large mode size has been reported [12] based on the subwavelength grating (metamaterial) concept [13], but it requires local etching of the silicon substrate under the coupler.…”