1984
DOI: 10.1109/edl.1984.25973
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Edge-defined self-alignment of submicrometer overlaid devices

Abstract: A novel device structure for self-aligning the overlaid device in a stacked CMOS process is introduced and demonstrated. The structure allows submicrometer channel length devices to be fabricated without using advanced lithographic technology. The self-alignment feature should permit a dense layout for CMOS static RAM applications.

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Cited by 6 publications
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“…Much work had been devoted to developing and studying VTFT's [ 1]- [3]. The inverted TFT structure is more advantageously used in an integrated circuit for increasing integration density and improving the topography [4].…”
Section: Introductionmentioning
confidence: 99%
“…Much work had been devoted to developing and studying VTFT's [ 1]- [3]. The inverted TFT structure is more advantageously used in an integrated circuit for increasing integration density and improving the topography [4].…”
Section: Introductionmentioning
confidence: 99%