2009
DOI: 10.1063/1.3193654
|View full text |Cite
|
Sign up to set email alerts
|

Effect of bias stress on mechanically strained low temperature polycrystalline silicon thin film transistor on stainless steel substrate

Abstract: This paper reported the variation in performance of bias stressed low-temperature polycrystalline silicon thin film transistors (LTPS TFTs) fabricated on metal foil substrate for flexible display applications. The mobility, threshold voltage (Vth), and trap density (Nt) of the proposed p-channel poly-Si TFT as a function of curvature radii were investigated. The significant increase in Vth by 9% was observed as the compressive or tensile mechanical strain increases to 0.1%. In addition, the hole mobility incre… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
2
1

Citation Types

1
9
0

Year Published

2011
2011
2022
2022

Publication Types

Select...
8
1

Relationship

0
9

Authors

Journals

citations
Cited by 26 publications
(10 citation statements)
references
References 13 publications
1
9
0
Order By: Relevance
“…tensile strain is applied to the device, with degradation at R = 30 mm smaller than R = 20 mm. These results were similar to those in previous reports, indicating that the average distance between Si-Si bonds is distorted in the poly-Si film [7], and hole mobility decreases, originating from the split between the light hole and heavy hole energy bands and an increase in mean free time on the surface orientation of poly-Si when the uniaxial tensile strain is parallel to the channel direction [4], [8].…”
Section: Methodssupporting
confidence: 92%
“…tensile strain is applied to the device, with degradation at R = 30 mm smaller than R = 20 mm. These results were similar to those in previous reports, indicating that the average distance between Si-Si bonds is distorted in the poly-Si film [7], and hole mobility decreases, originating from the split between the light hole and heavy hole energy bands and an increase in mean free time on the surface orientation of poly-Si when the uniaxial tensile strain is parallel to the channel direction [4], [8].…”
Section: Methodssupporting
confidence: 92%
“…Further, the current differences increased with the gate voltage (V G ). The strain on the substrate surface (ε surface ) at a certain bending curvature radius (R) can be expressed using the equation [16] [17], and the Y s of SS substrates is ∼200 GPa [18]. Hence, χ should be quite small as well.…”
Section: Resultsmentioning
confidence: 99%
“…Currently, however, few studies have demonstrated the resilience necessary to achieve foldable devices, and further gains in strength must be realized for broad flexible applications. Electrical characteristics under strain in LTPS TFTs on a flexible substrate have been previously reported. However, the specific degraded region in TFTs and its degradation mechanisms have not yet been adequately studied.…”
Section: Introductionmentioning
confidence: 99%