In this paper, we interpret and, for the first time, model a frequency dependent high-power microwave (HPM) upset susceptibility. We constructed the analytical models of the total amount of injected charges N inj , the excess carrier density distribution in P-Substrate, and the frequency dependent HPM upset susceptibility level. The models are validated by simulated results and experimental data, respectively. Results reveal that N inj is proportional to f α while the exponent α should be adjusted to −0.525. The excess carrier density distribution behaves the frequency dependence as well; the dependence is attributable to the fact that the AC field within the CMOS inverter varies too rapidly for the carriers to follow at high frequency. Meanwhile, the HPM upset susceptibility level is a decreasing function of f . The f dependent HPM upset susceptibility model is verified to be reliable and able to quickly estimate the susceptibility level of CMOS inverter considering IC technology, layout parameters, pulse properties, and operating environment simultaneously. Besides, the empirical formula P = A · f α is proposed to provide instant estimation to the HPM upset power threshold. In conclusion, by aid of the analytical model, we acquired the influence of the layout parameter L B on the HPM susceptibility and demonstrated that the CMOS inverter with minor L B is more susceptible to HPM.