Effect of IC layout on the reliability of CMOS amplifiers

Post-process die-level electromagnetic field analysis on microwave CMOS low-noise amplifier for first-pass silicon fabrication success

“…The use of EM simulators has expanded into integrated mm-wave circuit modeling methodologies [6,7], radio-frequency circuit design [8], PA [9], package modeling [10,11], circuit-level electromigration for interconnect reliability [12][13][14][15], leakage model for CMOS devices [16] and CMOS-compatible microelectromechanical systems (MEMS) devices [17][18][19] to meet first-pass success.…”