Effect of Non-Idealities on the Design and Performance of a DC-DC Buck Converter

Garg, Man Mohan; Pathak, Mukesh Kumar; Hote, Yogesh V.

doi:10.6113/jpe.2016.16.3.832

Cited by 19 publications

(10 citation statements)

References 10 publications

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“…Therefore, the expected output voltage of ideal Zeta converter should be 5 V for an input voltage (V g ) 15 V and duty cycle (D) 0.25. But due to voltage drop across equivalent series resistances (ESRs) of inductors and capacitors, it comes out to be less than 5 V which can easily be observed in simulation results [21]. The output voltage of non-ideal dc-dc Zeta converter is 4.7 V. The output current profile is same as output voltage for a resistive load of 1 Ω.…”

Section: Simulation Resultsmentioning

confidence: 88%

Mathematical Modeling of Non-ideal Zeta Converter Using Tags in MATLAB/Simulink

Garg¹,

Pathak²

2017

IJMERR

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 -There are various computer-aided software available to simulate dc-dc power converters using discrete semiconductor devices. Specifically, MATLAB is widely popular for simulation of power electronics converters. For these simulations, MATLAB provides a dedicated toolbox namely 'SimPowerSystem'. However, this paper presents an alternative approach to simulate power electronic circuits without having this toolbox. This approach is explained with example of a fourth-order non-ideal dc-dc Zeta converter. This method avoids the use of discrete semiconductor devices, resulting in fast and efficient simulation model. The effect of non-idealities of Zeta converter is also included in the simulated model. The simulation results verify that the different voltage and current responses are exactly same as obtained with 'SimPowerSystem' toolbox.

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Section: Simulation Resultsmentioning

confidence: 88%

Mathematical Modeling of Non-ideal Zeta Converter Using Tags in MATLAB/Simulink

Garg¹,

Pathak²

2017

IJMERR

Self Cite

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“…In , the effects of parasitic ESRs are already considered, and the difference equations – are derived accordingly. Unlike , the non‐idealities due to switch parasitics of the power MOSFET and the power diode are taken into consideration using the approach proposed in . In Figure , power stage of the buck converter accounts for switch and passive component parasitics.…”

Section: Modeling Of Dc–dc Buck Convertermentioning

confidence: 99%

Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC–DC buck converter

Bhattacharya

Kumar

Biswas

2017

Circuit Theory & Apps

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Summary This paper presents a semi‐automated word‐length optimization framework to reduce field‐programmable gate array (FPGA) resource utilization for FPGA‐based pre‐silicon test emulation of analog and mixed signal circuits while achieving the desired accuracy and overcoming long optimization time. Although high‐level behavioral models exist for modeling analog and mixed signal circuits, these comprise many complex differential equations which cannot be realized implicitly using Boolean logic (which is the basic functional block of an FPGA) on an FPGA. So, a more convenient way is explored to map analog circuits into digital domain by converting them into fixed‐point architectures because of its advantage of manipulating data with lower word‐length. To address the loss of accuracy due to finite word‐length effects and limited reconfigurable resources, word‐lengths are optimized under the constraint of given performance metrics. The proposed technique built in MATLAB/Simulink environment with Xilinx System Generator support is illustrated with the help of a case study of a peak‐current‐mode‐controlled buck‐type switching converter implemented on Xilinx Virtex™‐5 FPGA. To illustrate the applicability of this environment for pre‐silicon test development, well‐accepted fault models are emulated with the help of non‐ideal model of a buck converter. The emulation results are seen to be close to that of a post‐fabricated power converter in the presence of faults. Experimental results show that FPGA resource utilization can be reduced significantly while achieving the desired performance accuracy under the constraint of multiple error metrics. Copyright © 2017 John Wiley & Sons, Ltd.

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“…Recently, the research on switched mode power DC-DC converters are centred on proposing new topologies [4][5][6] and control techniques [7][8][9][10][11]. Along with this, design of DC-DC power converters and analysis is also one of the interesting areas of research [12][13][14][15][16][17][18][19][20][21][22][23]. Early research [12,13] on DC-DC power converters design and analysis focused on the unreal behaviour of the elements.…”

Section: Introductionmentioning

confidence: 99%

Low‐power non‐ideal pulse‐width modulated DC–DC buck–boost converter: design, analysis and experimentation

Siddhartha

Hote

2018

IET Circuits, Devices & Systems

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In this study, parasitic elements (non-idealities) effect on a low-power DC-DC buck-boost converter design is analysed and investigation is carried out by both large (i.e. steady-state) and small signal analysis. The large signal analysis of non-ideal buck-boost converter explored the significant information such as nearly accurate duty cycle, maximum allowable duty cycle and maximum possible output voltage. Further, accurate mathematical design formulae are derived of inductor and capacitor for specified inductor current ripple and output voltage ripple (OVR), respectively. Moreover, consequences of different equivalent series resistance of capacitor on OVR is examined. Subsequently, the exact model of buck-boost converter is procured from the small signal analysis, which is almost analogous to practical system. In order to show the impact of nonidealities on controller design, an internal model control PID controller is designed for ideal, semi-non-ideal and complete nonideal systems based on their respective models, which shows the controller based on non-ideal model provides very close results to practical system. Conclusively, the complete theoretical explorations are justified by simulations and substantiated by experimental results.

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Effect of Non-Idealities on the Design and Performance of a DC-DC Buck Converter

Cited by 19 publications

References 10 publications

Mathematical Modeling of Non-ideal Zeta Converter Using Tags in MATLAB/Simulink

Mathematical Modeling of Non-ideal Zeta Converter Using Tags in MATLAB/Simulink

Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC–DC buck converter

Low‐power non‐ideal pulse‐width modulated DC–DC buck–boost converter: design, analysis and experimentation

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