Effect of stress relaxation on the generation of radiation-induced interface traps in post-metal-annealed Al-SiO2-Si devices

Zekeriya, Viktor; Ma, T.P.

doi:10.1063/1.95200

Cited by 43 publications

(10 citation statements)

References 8 publications

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“…is stretched to nm, near-midgap states can open up that may at least metastably capture an electron, with the energetics of capture becoming more favorable with increasing Si-Si spacing [10], [119]. These kinds of stretched Si-Si bonds are likely to exist preferentially near the interface [10], [125], in which a significant amount of strain must be accommodated [125], [133], [136]- [141]. When an electron is captured, the Si-Si spacing decreases due to the increased electron density between the two atoms.…”

Section: B Defect Microstructures and Energiesmentioning

confidence: 99%

<formula formulatype="inline"><tex Notation="TeX">$1/f$</tex></formula> Noise and Defects in Microelectronic Materials and Devices

Fleetwood

2015

IEEE Trans. Nucl. Sci.

162

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This paper reviews and compares predictions of the Dutta-Horn model of low-frequency excess ( ) noise with experimental results for thin metal films, MOS transistors, and GaN/AlGaN high-electron mobility transistors (HEMTs). For metal films, mobility fluctuations associated with carrier-defect scattering lead to noise. In contrast, for most semiconductor devices, the noise usually results from fluctuations in the number of carriers due to charge exchange between the channel and defects, usually at or near a critical semiconductor/insulator interface. The Dutta-Horn model describes the noise with high precision in most cases. Insight into the physical mechanisms that lead to noise in microelectronic materials and devices has been obtained via total-ionizing-dose irradiation and/or thermal an- nealing, as illustrated with several examples. With the assistance of the Dutta-Horn model, measurements of the noise magnitude and temperature and/or voltage dependence of the noise enable estimates of the energy distributions of defects that lead to noise. The microstructure of several defects and/or impurities that cause noise in MOS devices (primarily O vacancies) and GaN/AlGaN HEMTs (e.g., hydrogenated impurity centers, N vacancies, and/or Fe centers) have been identified via experiments and density functional theory calculations.Index Terms-Border traps, gallium nitride, HEMTs, interface traps, low-frequency noise, MOS devices, noise, oxide traps, radiation response, silicon carbide. 0018-9499

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Section: B Defect Microstructures and Energiesmentioning

confidence: 99%

<formula formulatype="inline"><tex Notation="TeX">$1/f$</tex></formula> Noise and Defects in Microelectronic Materials and Devices

Fleetwood

2015

IEEE Trans. Nucl. Sci.

162

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“…The increase in Pbl centers may be a result of polished-induced stress changes at the Si02/Si interface. It has been reported that radiation-induced interface-trap buildup can be affected strongly by interfacial stress [20,21]. Even though the EPR measurements suggest that CMP has affected the interface, the electrical role of the P b l center remains unresolved.…”

Section: In Results and Discussionmentioning

confidence: 98%

Radiation-induced defects in chemical-mechanical polished MOS oxides

Shaneyfelt

Warren

Hetherington

et al. 1995

IEEE Trans. Nucl. Sci.

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Defect centers in chemical-mechanical polished MOS oxides generated by either x-ray irradiation or high-field stress have been characterized using electron paramagnetic resonance and C-V analysis. In x-ray irradiated samples equivalent densities of both oxide trap E' and interface-trap PbO centers were detected in unpolished and polished oxides. In addition, significantly larger (6 times) densities of Pbl centers were observed in irradiated chemical-mechanical polished oxides as opposed to unpolished oxides. This suggests that the polishing process alters the Si02/Si interface. However, the Pbl centers detected in these samples do not respond electrically like conventional interface traps or border traps. This raises questions concerning the electrical and physical nature of Pbl centers in these oxides. The high-field stress data showed no difference in the density of defect centers induced in polished and unpolished oxides. Pbl centers were not observed in either oxide following high-field stress.techniques will be required to fabricate the next generation of radiation-hardened technologies. In fact, Loral Federal Systems utilizes CMP during the manufacture of the radiation-hardened 1 Mbit SRAM ~3 1 .In this paper, we used electron paramagnetic resonance (EPR) to investigate the effects of CMP on the radiation response of thermal oxides. CMP has emerged as the surface planarization method of choice for commercial technologies with feature sizes 5 0.35 pm [4,5]. Films deposited on wafers are planarized by rotating the wafer under pressure against a polishing pad in the presence of a silica-based alkaline slurry. CMP is used to eliminate depth of focus problems for submicron lithography and defects associated with metal thinning that can occur over steep topography. The SEM cross section illustrated in Figure 1 depicts the surface topography before (top photo) and after (bottom photo) CMP of a tetraethylorthosilicate (TEOS) dielectric that was deposited on patterned metal lines. The photos show that chemical-mechanical polishing is effective at

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“…These results indicate that the Si/SiO interface of the WSi sample is less susceptible to, and less damaged by the -ray irradiation than compared with the CoSi sample. Since applying compressive stress at the Si/SiO interface has been found to reduce the generation of interface-trap-density by ionizing radiation [10], [11], we attribute this phenomenon to the fact that two additional annealing steps for forming CoSi enhances the interfacial tensile stress, and therefore increases the interface-trap-density after irradiation. An oxide trapped charge is produced as well by ionizing radiation and causes the -curves to shift along the voltage axis.…”

Section: Methodsmentioning

confidence: 98%

Radiation hardness comparison of MOS capacitors using tungsten polycide and cobalt polycideas gate electrode materials

2005

IEEE Electron Device Lett.

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In this letter, we investigate the radiation hardness of metal-oxide-semiconductor (MOS) capacitors with tungsten polycide (WSi ) and those with cobalt polycide (CoSi 2 ) as gate electrode materials. CoSi 2 has been considered as a gate/contact material for MOS devices in 0.18 m integrated circuit fabrication due to its low resistivity and good thermal stability. However, we found that MOS capacitors with a CoSi 2 gate electrode exhibited an increase in radiation-induced interface trap density shift of more than one order of magnitude, and more than eighteen times larger in radiation-induced flatband voltage shifts compared with those with the WSi gate electrode, after 1 Mrad Co 60 -ray irradiation under no applied bias.

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Effect of stress relaxation on the generation of radiation-induced interface traps in post-metal-annealed Al-SiO2-Si devices

Cited by 43 publications

References 8 publications

<formula formulatype="inline"><tex Notation="TeX">$1/f$</tex></formula> Noise and Defects in Microelectronic Materials and Devices

<formula formulatype="inline"><tex Notation="TeX">$1/f$</tex></formula> Noise and Defects in Microelectronic Materials and Devices

Radiation-induced defects in chemical-mechanical polished MOS oxides

Radiation hardness comparison of MOS capacitors using tungsten polycide and cobalt polycideas gate electrode materials

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