Effect of Substrate Layer Variation on Package Warpage

Abstract

As requirements for thinner packages continue to be driven by increased device functionality, warpage has become more and more of a concern in package design and processing. Designers are limited by available materials whose properties are not always capable of achieving low warpage targets. Outside of materials development, techniques in the fabrication processing of organic substrates have served as an important secondary approach to reducing package-level warpage. This is becoming more and more important as the substrate thickness is reduced. For a thin substrate, each layer has a marked impact on the substrate's mechanical character, so each must be specified carefully. In addition, a thin substrate is more sensitive to parameter variation within design tolerance and processing windows, resulting in higher warpage standard deviation, which is another challenge for warpage control. In this paper, several substrate attributes are studied to determine the magnitude of their effect on overall package warpage and deviation. Packages are built using substrates with different variations of metal layer thickness, dielectric layer thickness, solder resist layer thickness, and metal layer density. Warpage data for these packages will be presented alongside statistical analysis. Warpage simulations are also performed and compared to assembly measurement data to rank the largest contributors. The goal of this paper is to inform package design teams of the best ways to limit warpage through processing, when bill of material changes are unavailable.