Effective enforcement of path-delay constraints in performance-driven placement

Chou, Yih-Chih; Lin, Youn-Long

doi:10.1109/43.974133

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

2002

DOI: 10.1109/43.974133

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Effective enforcement of path-delay constraints in performance-driven placement

Yih-Chih Chou

Youn-Long Lin

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2007

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Cited by 6 publications

References 28 publications

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A Novel High Level Synthesis Approach

Jia

Tao

et al. 2007

2007 10th IEEE International Conference on Computer-Aided Design and Computer Graphics

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Propose a novel high level synthesis design flow based on Fuzzy set theory to improve the circuit performance. It treats unscheduled operations as having uncertain schedules, and then applies fuzzy set theory to quantify these uncertainties during allocation. At last synthesis circuit based on concurrent Evolutionary Technique. Experimental results are presented to demonstrate the strength of this approach. And the results show good result with our method.

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A Novel High Level Synthesis Approach

Jia

Tao

et al. 2007

2007 10th IEEE International Conference on Computer-Aided Design and Computer Graphics

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High Level Synthesis Based on Fuzzy Theory with Evolutionary Technique

Tao

Sun

et al. 2007

2007 International Workshop on Electron Devices and Semiconductor Technology (EDST)

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Improving simulated annealing placement by applying random and greedy mixed perturbations [IC layout]

Hentschke

Reis

16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings.

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This paper presents an improvement to placement using Simulated Annealing by applying a mix of greedy perturbations with the traditional random perturbations. The used greedy movements are based on a forcedirected technique focused on wire length optimization. By analyzing cost curves related to running time, it is possible to see that our technique can converge faster than with any isolated technique. The experiment results show that our mixed perturbation schema outperforms Timberwolf [1] random perturbation approach by 13,18% (wire length) and 21,36% (maximum wire congestion) in the best case.

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Effective enforcement of path-delay constraints in performance-driven placement

Cited by 6 publications

References 28 publications

A Novel High Level Synthesis Approach

A Novel High Level Synthesis Approach

High Level Synthesis Based on Fuzzy Theory with Evolutionary Technique

Improving simulated annealing placement by applying random and greedy mixed perturbations [IC layout]

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