Effective theorem proving for hardware verification

Cyrluk, David; Sunitha, R; Shankar, Natarajan; Srivas, Mandayam K.

doi:10.1007/3-540-59047-1_50

Cited by 44 publications

(24 citation statements)

References 15 publications

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“…A menu provides help information. The PVS approach [6] Rispe proof for an n-bit adder safe and efficient, but also reconfigurable and customizable. Decision procedures can be made part of conversions and tactics, which in Rispe has been done for arithmetic reasoning only.…”

Section: Resultsmentioning

confidence: 99%

A reduced instruction set proof environment

Busch

1995

Theorem Provers in Circuit Design

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Abstract. A general-purpose proof interface has been created on top of the higher-order-logic theorem prover LAMBDA in order to improve the efficiency of human interaction and minimize the learning overhead. Users are freed from tedious low-level interactions by way of extended proof automation routines. All essential [_AMBDA functions for interactive proof development are accessible via a handy set of user commands.

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Section: Resultsmentioning

confidence: 99%

A reduced instruction set proof environment

Busch

1995

Theorem Provers in Circuit Design

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“…As [5] points out for hardware renement proofs, a large share of the proof obligations can be discharged by repeated unfolding (rewriting) of definitions, case splits and basic simplication. While easy to automate, these steps lead easily to an increase in complexity.…”

Section: Approachmentioning

confidence: 99%

“…While most work on processor verication focuses on functional correctness [4,5,21] and ignores information ow, we survey hardware noninterference, both for special separation hardware and for general purpose hardware.…”

Section: Related Workmentioning

confidence: 99%

Automatic Derivation of Platform Noninterference Properties

Schwarz

Dam

2016

Software Engineering and Formal Methods

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Abstract. For the verication of system software, information ow properties of the instruction set architecture (ISA) are essential. They show how information propagates through the processor, including sometimes opaque control registers. Thus, they can be used to guarantee that user processes cannot infer the state of privileged system components, such as secure partitions. Formal ISA models -for example for the HOL4 theorem prover -have been available for a number of years. However, little work has been published on the formal analysis of these models. In this paper, we present a general framework for proving information ow properties of a number of ISAs automatically, for example for ARM. The analysis is represented in HOL4 using a direct semantical embedding of noninterference, and does not use an explicit type system, in order to (i) minimize the trusted computing base, and to (ii) support a large degree of context-sensitivity, which is needed for the analysis. The framework determines automatically which system components are accessible at a given privilege level, guaranteeing both soundness and accuracy.

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“…al. using PVS [4]. CLAM is a system that generates proofs by induction for a higher-order logic (a constructive type theory).…”

Section: Statistics Comparison and Conclusionmentioning

confidence: 99%

“…Users can control proof construction by writing proof strategies (similar to tactics in the LCF sense). In [4] the adder and the ALU are verified using the induction, normalization, and BDD features of PVS. The formalization of these circuits is similar to Cantu's.…”

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confidence: 99%

Hardware Verification using Monadic Second-Order Logic

Basin¹,

Klarlund²

1995

BRICS

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We show how the second-order monadic theory of strings can be used to specify hardware components and their behavior. This logic admits a decision procedure and counter-model generator based on canonical automata for formulas. We have used a system implementing these concepts to verify, or find errors in, a number of circuits proposed in the literature. The techniques we use make it easier to identify regularity in circuits, including those that are parameterized or have parameterized behavioral specifications. Our proofs are semantic and do not require lemmas or induction as would be needed when employing a conventional theory of strings as a recursive data type.

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Effective theorem proving for hardware verification

Cited by 44 publications

References 15 publications

A reduced instruction set proof environment

A reduced instruction set proof environment

Automatic Derivation of Platform Noninterference Properties

Hardware Verification using Monadic Second-Order Logic

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