Effects of dispatching and down time on the performance of wafer fabs operating under theory of constraints

Kayton, D.; Teyner, T.; Schwartz, Chad; Uzsoy, Reha

doi:10.1109/iemt.1996.559681

Cited by 13 publications

(11 citation statements)

References 16 publications

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“…The effectiveness of the maintenance function is evaluated based on the performance of the overall factory in terms of work in process inventory (WIP), on-time delivery and factory lead Manuscript time. Kayton et al [8] have shown that the duration of down times is more important than its average availability in terms of its effect on factory performance. With longer breakdowns, given the same availability, more buffer inventory is required to prevent bottleneck starvation.…”

Section: Introductionmentioning

confidence: 99%

Maintenance scheduling and staffing policies in a wafer fabrication facility

Mosley

Teyner²,

Uzsoy

1998

IEEE Trans. Semicond. Manufact.

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We examine how to reduce the adverse effects of machine down time by prioritizing production equipment for attention by a limited number of maintenance personnel. The maintenance scheduling policies use system information to determine which machines are the most critical at a given time. This information includes repair times, queue lengths, due dates, available capacity, and steady-state utilizations. The effects of different staffing levels are also considered. A discrete-event simulation model of a wafer fabrication facility is used to examine the performance of the different policies. Results indicate that the choice of maintenance scheduling policy can significantly affect system performance under restrictive staffing levels. Moreover, factory performance is shown to be sensitive to small changes in staffing level.

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Section: Introductionmentioning

confidence: 99%

Maintenance scheduling and staffing policies in a wafer fabrication facility

Mosley

Teyner²,

Uzsoy

1998

IEEE Trans. Semicond. Manufact.

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“…For multi-stage systems, results suggest that, when compared with FIFO, the impact on cycle time of the variants of SPT depends on the product recipes and the product mix used, and the direction of improvement cannot be predicted with any accuracy if FIFO were to be replaced by these variants. For wafer fabs operating under the Drum-Buffer-Rope release policy, Kayton et al (1996) have discovered that the CR dispatching rule offers an excellent trade-off between average cycle time, its variance and bottleneck utilisation, when compared with FIFO. When multiple performance measures are considered, Uzsoy et al (1992) examine a variety of standard dispatching rules including SPT, Job-EDD, operation-EDD, SRPT, ATCS and COVERT, and their results indicate that no one rule dominates the others with regard to its performance on all performance measures.…”

Section: Fab-wide Dispatching Rulesmentioning

confidence: 99%

A survey of dispatching rules for operational control in wafer fabrication

Sarin

Varadarajan

Wang

2010

Production Planning & Control

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Production scheduling in semiconductor wafer fabs is a non-trivial task owing to the complexity of wafer fabrication. Dispatching rules are the most commonly used tools for shop floor control in this industry. Over the years, advanced dispatching rules, capable of impacting multiple performance measures and utilising both upstream and downstream information in assigning lot priorities, have been introduced. This article aims to provide an overview of these rules and explores the effectiveness of their performance as they pertain to different areas in a wafer fab. Based on this overview, several future directions on developing new dispatching rules are also proposed.

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“…To evaluate our approach with a more realistic simulation, we employ the model of a wafer fabrication facility (fab) described by Kayton et al (1996). The manufacturing process of semiconductor wafers involves several processing steps at a number of stations.…”

Section: A Wafer Fab Modelmentioning

confidence: 99%

“…The proportion of 'Late' responses in our data was around 72%. Additionally, the simulation Laidler, Morgan, Nelson, and Pavlidis can be performed with a choice of dispatching rules, relating to the order in which queueing wafers are processed (Kayton et al 1996). The results displayed in Figures 7 and 8 used a 'least work remaining' rule, in which priority is given to wafers which are nearer completion.…”

Section: A Wafer Fab Modelmentioning

confidence: 99%

Metric Learning for Simulation Analytics

Laidler

Morgan

Nelson

et al. 2020

2020 Winter Simulation Conference (WSC)

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The sample path generated by a stochastic simulation often exhibits significant variability within each replication, revealing periods of good and poor performance alike. As such, traditional summaries of aggregate performance measures overlook the more fine-grained insights into the operational system behavior. In this paper, we take a simulation analytics view of output analysis, turning to machine learning methods to uncover key insights from the dynamic sample path. We present a k nearest neighbors model on system state information to facilitate real-time predictions of a stochastic performance measure. This model is built on the premise of a system-specific measure of similarity between observations of the state, which we inform via metric learning. An evaluation of our approach is provided on a stochastic activity network and a wafer fabrication facility, both of which give us confidence in the ability of metric learning to provide interpretation and improved predictive performance.

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Effects of dispatching and down time on the performance of wafer fabs operating under theory of constraints

Cited by 13 publications

References 16 publications

Maintenance scheduling and staffing policies in a wafer fabrication facility

Maintenance scheduling and staffing policies in a wafer fabrication facility

A survey of dispatching rules for operational control in wafer fabrication

Metric Learning for Simulation Analytics

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