“…Additionally, after annealing, the surface morphology of the GaAs buffer layer was maintained, but at a higher annealing temperature (above 600 °C), an increase in roughness was observed together with the formation of large surface pits with a width of ∼350 nm and a depth of ∼90 nm (not shown here). The QDs formed on such a rough surface will have a large size fluctuation, leading to a board PL emission, along with the formation of high-density of coalescence dots, 23) and the QD PL intensity from such a sample is expected to be low [Fig. 2(b) (pink curve)].…”