Effects of high pressure annealing on the characteristics of solid phase crystallization poly-Si thin-film transistors

Abstract

Integrating circuits into organic light emitting diode displays require fabrication of polycrystalline silicon (poly-Si) based thin-film transistors (TFTs) on glass substrates. In this work we evaluated the use of high pressure annealing (HPA) process of poly-Si films in H2O atmosphere to improve TFT characteristics via reducing defect density in poly-Si films. We attempted to develop a HPA process at temperatures below 600°C without causing any glass distortion and reducing the throughput. The HPA-treated poly-Si film was analyzed using various spectroscopic methods such as Raman, x-ray photoelectron spectroscopy, and transmission electron microscope, and the evaluation of the characteristics of TFTs fabricated by such poly-Si films was made. The heating at 550°C with 1MPa H2O vapor increased the carrier mobility from 8.5to20cm2∕Vs and reduced the absolute value of the threshold voltage from 9.6to6.5V, as compared with the conventional solid phase crystallization (SPC) process. The sub-threshold swings also decreased from 1.2to0.8V/decade. Since the realization of good performance in poly-Si depends on the defect density, the poly-Si formed by a combined process of SPC and HPA may be well suited for fabrication of poly-Si TFTs for flat panel displays such as liquid crystal display and active matrix organic light emitting diode that require circuit integration on panels.

CH3NH3PbI3-based Perovskite Material Patterning and Thin-Film Transistor Fabrication

“…The V th was defined as the value of V g at which I d = 10 nA at V d =-1 V. The 𝜇 fe of these TFTs was estimated from Eq. ( 1) [32].…”

Effects of gate insulator using high pressure annealing on the characteristics of solid phase crystallized polycrystalline silicon thin-film transistors

“…For the SPC poly-Si annealed for 1 h at 2 MPa, the oxide thickness is about 150 Å, which well matched with the x-ray photoelectron spectroscopy results. 4 The final oxide layer is approximately 90 Å above the original surface of the poly-Si and 60 Å below the original surface. 5 The surface of the SPC poly-Si film was retained after the film was annealed.…”

“…The oxidation rate for the HPA process is diffusion limited for the range of the annealing times studied in this work. 4 Surface roughness becomes a significant issue for TFT applications because of the problems related to uniformity. The high surface roughness of poly-Si is expected to aggravate the breakdown characteristics of the GI by creating a local high electric field.…”

Crystallization of amorphous silicon thin films using nanoenergetic intermolecular materials with buffer layers

“…However, grain boundaries acting as high local potential barriers in poly-Si can limit the performance of poly-Si devices. Several technologies, including solid-phase crystallization, excimer laser crystallization, and metal-induced crystallization, could be employed to produce high-quality poly-Si with larger grain size, lower grain boundary energy, and higher carrier mobility [1][2][3]. However, these technologies represent several limitations, such as long annealing time, poor uniformity due to the scan overlap of laser shots and the incorporation of metal atoms in poly-Si, respectively [4][5][6].…”