2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual 2007
DOI: 10.1109/relphy.2007.369887
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Effects of Lateral Charge Spreading on the Reliability of TANOS (TaN/AlO/SiN/Oxide/Si) NAND Flash Memory

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Cited by 47 publications
(29 citation statements)
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“…The higher the normalized values, the more the loss of the charge stored in the SiN layer increases. Several researchers have reported that the stored charge can spread via the charge-trapping layer and the retention performance of charge trap memories can be affected [16][17][18]. Accordingly, from the result of Fig.…”
Section: Resultsmentioning
confidence: 99%
“…The higher the normalized values, the more the loss of the charge stored in the SiN layer increases. Several researchers have reported that the stored charge can spread via the charge-trapping layer and the retention performance of charge trap memories can be affected [16][17][18]. Accordingly, from the result of Fig.…”
Section: Resultsmentioning
confidence: 99%
“…Published single-cell data ( Figure 36) suggest that a good intrinsic retention can be achieved, as expected from a floating-gate design [289]. The retention properties of charge-trap based planar devices have been extensively investigated as a function of temperature and bias [300], pointing out the roles of vertical charge loss through the tunnel oxide and lateral charge migration in the nitride [301][302][303][304], which also reduces the stored charge located above the channel region, that determines V T . In 3D devices, the importance of such effects is shown in Figure 37, where lateral diffusion along the nitride is modulated by the state of adjacent cells [305]: having all cells programmed decreases the concentration gradient, slowing down diffusion and reducing the V T shift.…”
Section: Retentionmentioning
confidence: 78%
“…Besides, the SONOS top layer can efficiently stop the electrons, which allows to study the lateral electron redistribution without vertical charge loss. As already mentioned, this lateral redistribution could lower the memory reliability [7].…”
Section: Sonos Transistor Retention In Programmed Statementioning
confidence: 81%
“…Besides, edge effects in SANOS devices have been already mentioned in the literature [7]. These edge effects are considered as a potential problem and appropriate test structures have to be determined to study this mechanism.…”
Section: Sanos Transistor Retention In Programmed Statementioning
confidence: 99%