Effects of pressure and bias voltage on the phase noise of CMOS-MEMS oscillators

Abstract

In this work, we present a comprehensive study on the effects of environmental pressure (P) and resonator dc-bias voltage for the phase noise of a monolithic CMOS-MEMS oscillator. In order to access the practical utility of CMOS-MEMS oscillators for versatile applications, a double-ended tuning fork (DETF) MEMS resonator oscillator is used as a case study. In the ambient pressure, the oscillation ensues at a minimum V P = 30V and shows a phase noise (PN) of -86 dBc/Hz at 1-kHz offset and -99 dBc/Hz at 1-MHz offset. On the other hand, a low-V P CMOS-MEMS oscillator with IC compatible voltage (i.e., V P = 3V, leading to an equivalent motional impedance R m of 100 MΩ) is also demonstrated in a vacuum chamber (P < 1 mTorr) with a PN of -94 dBc/Hz at 1-kHz offset and -98 dBc/Hz at 1-MHz offset, respectively.