Efficiency Comparison of Inductor-, Capacitor-, and Resonant-Based Converters Fully Integrated in CMOS Technology

Abstract

Abstract-The full integration of DC-DC converters offers great promise for dramatic reduction in power consumption and the number of board-level components in complex systems on chip. Some papers compare the numerous published on-chip and on-die converter structures, but there is the need for an approach to accurately compare the main basic DC-DC conversion topologies. Therefore, this paper presents a method to compare the efficiencies of CMOS integrated capacitive-, inductive-and resonant-based switching converters. The loss mechanism of each structure in hard-switching conditions is detailed and the analytical equations of the power loss and output voltage are given as a function of few CMOS technology parameters. The resulting models can be used to accurately predict converter efficiency in the early design phase, to compare the basic structure in particular the technology node or to orient the passive choice. The proposed method is then applied to design, optimize and compare fully-integrated power delivery requirements on a 1mm 2 on-die area in 65nm CMOS technology over three decades of power density. The results also underline the high efficiency of the promising resonant-based converter.Index Terms-integrated switching power supply, on-chip voltage regulator, switched-capacitor converter, inductive power converter, resonant converter

Modeling and Efficiency Analysis of Multiphase Resonant-Switched Capacitive Converters

“…A switching sequence (one cycle) is illustrated in Fig. 1 [14]. There are four possible switch states called S k shown in Table 1 for each phase based on the switch configuration of a 2:1 SCC (K in and K out coefficients are used later).…”

Dual-Input Switched Capacitor Converter Suitable for Wide Voltage Gain Range

“…A 10 interleave structure [12] is also used to decrease the output ripple. • Capacitor integration: the polysilicon and metal capacitors are stacked to achieve the highest capacitance density (15 ) in the considered technological node. The MIM option is not used.…”

“…However, the converter still acts outside the few added ratios proposed in the literature in most applications [5]. Another solution is to design a hybrid structure using switched capacitor connected in series to a magnetic converter [15]. The authors of [16] obtained a better efficiency over a wider range even though the inductor was less constrained than in a classical pure inductive converter; its integration on chip in hybrid architecture would still be challenging for some applications.…”

3D ICs: An opportunity for fully-integrated, dense and efficient power supplies

“…In following the switching loss means the loss due to the charge and discharge of the gate capacitance, not the loss induced by the nonzero V ds ×I ds product during the switching. The overall loss can be summarized by the following equation from [16] in SSL or FSL regions [2]:…”