Efficient and side-channel-aware implementations of elliptic curve cryptosystems over prime fields

Karakoyunlu, Deniz; Gürkaynak, Frank K.; Sunar, Berk; Leblebici, Yusuf

doi:10.1049/iet-ifs.2009.0038

Cited by 22 publications

(4 citation statements)

References 47 publications

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“…Then, Ref. [41] proposed an improved Montgomery multiplication processor structure based on RSD [42]. Ref.…”

Section: Introduction 1related Workmentioning

confidence: 99%

A Novel JSF-Based Fast Implementation Method for Multiple-Point Multiplication

Chen,

2023

Electronics

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ECC is a popular public-key cryptographic algorithm, but it lacks an effective solution to multiple-point multiplication. This paper proposes a novel JSF-based fast implementation method for multiple-point multiplication. The proposed method requires a small storage space and has high performance, making it suitable for resource-constrained IoT application scenarios. This method stores and encodes the required coordinates in the pre-computation phase and uses table lookup operations to eliminate the conditional judgment operations in JSF-5, which improves the efficiency by about 70% compared to the conventional JSF-5 in generating the sparse form. This paper utilizes Co-Z combined with safegcd to achieve low computational complexity for curve coordinate pre-computation, which further reduces the complexity of multiple-point multiplication in the execution phase of the algorithm. The experiments were performed with two short Weierstrass elliptic curves, nistp256r1 and SM2. In comparison to the various CPU architectures used in the experiments, our proposed method showed an improvement of about 3% over 5-NAF.

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“…Then, Ref. [41] proposed an improved Montgomery multiplication processor structure based on RSD [42]. Ref.…”

Section: Introduction 1related Workmentioning

confidence: 99%

A Novel JSF-Based Fast Implementation Method for Multiple-Point Multiplication

Chen,

2023

Electronics

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“…Repetitive plans, for example, convey spare math (CSA) [1], [2], excess marked digits (RSDs) [3], or deposit number frameworks (RNSs) [4], [5], have been used in different outlines. Convey rationale or inserted computerized flag preparing (DSP) hinders inside field programmable entryway exhibits (FPGAs) are additionally used in a few outlines to address the convey spread issue " [6], [7].…”

Section: Introductionmentioning

confidence: 99%

VLSI design for efficient RSD-Based ECC processor using Karatsuba algorithm

Swetha¹,

Sonti²,

Murali³

2017

IJET

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In this paper, an exportable application-particular direction set elliptic bend cryptography processor in view of repetitive marked digit portrayal is proposed. The processor utilizes broad pipelining strategies for Karatsuba-Of man strategy to accomplish high throughput augmentation. Moreover, an effective particular viper without correlation and a high throughput measured divider, which brings about a short data path for expanded recurrence, are actualized. The proposed design of this paper investigation the rationale size, region and power utilization utilizing Xilinx 13.2. The expansion for the task is Vedic Sutra -Nikhilam Sutra.

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“…Higher-radix Montgomery multiplier implementations have been reported in [12], [13], [14] (radix-4), [15], [16] (radix-8), [17], [18], [19] (radix-16), [20] (radix-32), [21] (radix-64), and [22] (radix-256). Higher-radix multipliers typically result in faster multiplications, but also require more area than radix-2 multipliers.…”

Section: Introductionmentioning

confidence: 99%

Pipelined modular multiplier supporting multiple standard prime fields

Alrimeih

Rakhmatov

2014

2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors

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Computationally-intensive cryptographic applications are critically dependent on the efficiency of modular multiplications. It is desirable for a modular multiplier to offer not only high performance, but also a certain degree of flexibility, supporting multiplications over finite fields of varying size. We propose a fast and flexible modular multiplier over five prime fields GF (p), standardized by NIST for use in elliptic curve cryptography, where the five special primes p are of size 192, 224, 256, 384, and 521 bits. A prime-specific datapath configuration of our multiplier is established automatically, based on an external control word that identifies a NIST prime in use. The pipeline latency of our multiplier (implemented on a Virtex-6 FPGA and running at 100 MHz) is 80 ns for 192-bit, 224-bit, and 256-bit NIST primes, and 200 ns for 384-bit and 521-bit NIST primes. The main limitation of this work is that our multiplier currently supports only the NIST prime fields. We believe that such a limitation is justifiable, as the NIST prime fields are widely used in practice and enable performance improvements through specialized hardware optimizations.

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Efficient and side-channel-aware implementations of elliptic curve cryptosystems over prime fields

Cited by 22 publications

References 47 publications

A Novel JSF-Based Fast Implementation Method for Multiple-Point Multiplication

A Novel JSF-Based Fast Implementation Method for Multiple-Point Multiplication

VLSI design for efficient RSD-Based ECC processor using Karatsuba algorithm

Pipelined modular multiplier supporting multiple standard prime fields

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