Efficient ASIC and FPGA implementations of IIR filters for real time edge detection

Lorca, Federico García; Kessal, Lounis; Demigny, Didier

doi:10.1109/icip.1997.638793

Cited by 31 publications

(7 citation statements)

References 6 publications

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“…Moreover, we also proposed a scalable FIFO design in two distinct schemes that can be used for five different sizes. The present work achieved a compact and flexible primitive core for edge detection at a high frame rate of 280 frames/s with low complexity and hence, suitable for various high mobility-demanding machine vision applications [2,7].…”

Section: Discussionmentioning

confidence: 99%

Real-time realisation of noise-immune gradient-based edge detector

Hsiao

Chen

Wen

et al. 2006

IEE Proc., Comput. Digit. Tech.

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A computational field-programmable gate array (FPGA) realisation for edge detection that is particularly immune to noise by a digital approximated Gaussian smoothing filter is described. The proposed systolic array architecture was examined for convolution operation in order to put simplicity and regularity to the design. Moreover, most of the presented processing structures are highly pipelined, so that the goal of real-time computing is substantially achieved with the processing frame rate reaching up to 280 frames per second. For an efficient hardware mapping, the absolute difference mask algorithm was adopted because of its regularity and independent operations, as well as its important property of performing one-pixel-edge localisation. A scalable first in, first out (FIFO) design was also proposed to make the edge detector applicable to five different image sizes. The FPGA realisation on the presented versatile development platform shows that the proposed design improves both the speed and the hardware usage. This is attributed to the utilisation of the proposed parallel and pipelined structure so that a fast operating speed of 73.6 MHz, which is about 265 times faster than the digital signal processing environment, is obtained in the present investigation.

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Section: Discussionmentioning

confidence: 99%

Real-time realisation of noise-immune gradient-based edge detector

Hsiao

Chen

Wen

et al. 2006

IEE Proc., Comput. Digit. Tech.

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“…The Federico Garcia Lorca [37] filter is an example of the implemented image processing. This filter is a simplification of the Deriche filter [38], the recursive implementation of the optimal Canny filter. The smoother is applied horizontally and vertically on the image, in a serial way.…”

Section: Image Processingmentioning

confidence: 99%

A smart sensor-based vision system: implementation and evaluation

Elouardi¹,

Bouaziz²,

Dupret³

et al. 2006

J. Phys. D: Appl. Phys.

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These days, smart home applications such as concierge service for residents, home appliance control, and so on are attracting attention. To realize these applications, we need a system which recognizes various human activities accurately with a low cost device. There are many studies on the activity recognition in a smart home. We also have proposed an activity recognition technique in a smart home by utilizing digital-output-PIR (passive infrared) sensors, door sensors, and power meters. However, the study has an unsolved issue: we cannot distinguish similar activities happening at the same place, for example, "eating" and "reading" while sitting on a sofa. In order to cope with this challenge, we introduce ALPAS: analog-output-PIR-sensor-based activity recognition technique which recognizes the different activities in the same place. Our technique recognizes user's activity by utilizing machine learning with frequency components of the sensor's output as features. However, because the number of features used in ALPAS is 1000 for each analog PIR-sensor, a large capacity memory is required. To reduce the number of features, we select a part of the sensing data. We call the starting point of the selected data as starting frequency (SF) and ending part as ending frequency (EF). We searched SF and EF using a grid search, and evaluated the recognition accuracy. We evaluated the proposed technique in a smarthome testbed. In the evaluation, five participants performed four different activities while sitting on a sofa. As a result, we achieved F-Measure: 63.9% when the EF is 1.4 Hz, and F-Measure: 50% or lower when the SF is 9.9 Hz or higher.

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“…PSO performs randomized search of unknown parameter space by manipulating a population of parameter estimates to converge on a suitable solution. This technique is independent of the adaptive filter structure .Computation cost can be reduced by use of recursive filters in optimal edge detectors [49]. Here anew organization of the filter is proposed at the 2D and 1D levels which reduce the memory size and the computation cost by a factor of two.…”

Section: Literature Reviewmentioning

confidence: 99%

Vedic Mathematics for Digital Signal Processing Operations: A Review

Gaikwad¹,

Chavan²

2015

IJCA

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Speed improvement in Digital signal processing is considered to be challenging. High speed multipliers and adders are prime requirement for digital filters and for FFT operations.Vedic mathematics is an ancient scheme based on 16 formulas (sutras). These are simple and easy methods which can be directly applied for DSP computations. Many researchers have worked on multiplier designs using Vedic operators. Present paper deals with exhaustive review of literature based on Vedic mathematics. It shows that Vedic mathematics can be used for fast signal processing. Multipliers based on Vedic mathematics can be used for speed improvement, reduction in power consumption, complexity, area etc. Vedic mathematical algorithms can be proved efficient over traditional (existing) methods in FIR and IIR filters for providing effective results in de-noising of biomedical Signal.

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Efficient ASIC and FPGA implementations of IIR filters for real time edge detection

Cited by 31 publications

References 6 publications

Real-time realisation of noise-immune gradient-based edge detector

Real-time realisation of noise-immune gradient-based edge detector

A smart sensor-based vision system: implementation and evaluation

Vedic Mathematics for Digital Signal Processing Operations: A Review

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