Efficient Byte Stream Pattern Test using Bloom Filter with Rolling Hash Functions on the FPGA

Wada, Takuma; Matsumura, Naoki; Nakano, Koji; Ito, Yasuaki

doi:10.1109/candar.2018.00016

Cited by 8 publications

(9 citation statements)

References 19 publications

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“…However, an improved version of PBF is implemented in this work. In [24], a rolling hash function based Bloom filter is presented and implemented on a high-end FPGA for fast streaming data. However, the architecture assumes a byte-based interface which is only suitable for Gigabit Ethernet networks.…”

Section: Related Workmentioning

confidence: 99%

Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications

Sateesan

Vliegen²,

Daemen³

et al. 2022

Microprocessors and Microsystems

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Section: Related Workmentioning

confidence: 99%

Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications

Sateesan

Vliegen²,

Daemen³

et al. 2022

Microprocessors and Microsystems

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“…Furthermore, from the practical point of view, it is not necessary to use prime numbers for q. We can use q such that the values of max and num (2 26 , 2 17 ) = 2 15 , they are large enough and it makes sense to select q = 2 26 .…”

Section: Rolling Hash Functionmentioning

confidence: 99%

“…Recall that we use q = 2 26 for DSP-based implementations DSP1 and DSP4. Figure 5 illustrates a circuit to compute…”

Section: Dsp-based Implementationsmentioning

confidence: 99%

“…Recall that our BF engine computes four hash functions and combine them to obtain a signature due to the limitation of circuits. We simply select q = 2 26 and d's such that max( (q, d)) = 2 24 for rolling hash function. For such q and d's, we simply perform…”

Section: 2mentioning

confidence: 99%

“…We can use q such that the values of max 𝛾(q) and num𝛾(q, D) are large enough. Thus, in our RAM-based implementation that we will show later, we will use q = 1024 for RAM-based implementations instead because max 𝛾(1024) = 256 and num𝛾(1024, 1024) = 256. and num𝛾(2 26 , 2 17 ) = 2 15 , they are large enough and it makes sense to select q = 2 26 .…”

Section: Rolling Hash Functionmentioning

confidence: 99%

See 2 more Smart Citations

Efficient implementations of Bloom filter using block RAMs and DSP slices on the FPGA

Wada

Matsumura

Yasudo

et al. 2019

Concurrency and Computation

Self Cite

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This paper presents efficient FPGA implementations for the Bloom filter, in which a large set P of L-byte patterns are registered beforehand. Our Bloom filter circuit performs the byte stream pattern test such that it receives an input byte stream t and outputs the bit stream in every clock cycle. Each bit of the output bit stream is 1 if an L-byte sequence of t starting from the corresponding position is identical with one of the patterns in P. Our circuits use rolling hash functions to compute signatures of all patterns in P registered in Ultra RAMs of the Xilinx UltraScale+ FPGA VU9P. We present two types of implementations, DSP-based implementation and RAM-based implementation to compute rolling hash functions of L-byte sequences using DSP slices and Block RAMs in the FPGA, respectively. The experimental results show that both DSP-based and RAM-based Bloom filter circuits for 4800K patterns of length 1024 can perform the byte stream pattern test for 1.1 Gps and 1.3 Gbps input byte streams, respectively, with false positive probability 10 −12 . Moreover, we can configure DSP-based and RAM-based Bloom filter circuits for 100K patterns to work for 54.9 Gbps and 62.2 Gbps input byte streams, respectively, with false positive probability 10 −12 .

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SoK - Network Intrusion Detection on FPGA

Jeune

Sateesan

Rabbani

et al. 2022

Security, Privacy, and Applied Cryptography Engineering

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Efficient Byte Stream Pattern Test using Bloom Filter with Rolling Hash Functions on the FPGA

Cited by 8 publications

References 19 publications

Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications

Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications

Efficient implementations of Bloom filter using block RAMs and DSP slices on the FPGA

SoK - Network Intrusion Detection on FPGA

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