Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces

Abstract

Abstract

Hierarchical synthesis based on pareto-optimal fronts

“…An approach recently proposed is to use Pareto fronts of lower-level sub-blocks to compose the Pareto front of the higher level block [10]. This idea is graphically illustrated in Fig.…”

“…However, as pointed out in [10], composition of fronts cannot be performed carelessly. The idea described above can only be exploited under the assumption that we only need the lower level POFs to compose the higher level POFs.…”

“…In this Section a previously reported bottom-up flow [10] is reviewed and a hybrid bottom-up/top-down flow is proposed. Advantages and limitations of both approaches are discussed.…”

“…Consider, for the sake of simplicity, two performance objectives, f 1 i and f 2 i ,of a block at level i, that depend of two objectives of a sub-block at level i1. This is mathematically stated as [10]:…”

Hierarchical synthesis system with hybrid DLO‐MOGA optimization

“…This approach offers improved feasibility modeling and reduced computational cost by avoiding poor performing sub-block designs. These Pareto-optimal surfaces can be used to enable a Multi-Objective Bottom-Up Methodology (MOBU), detailed in Figure 1b, where selected Pareto-optimal designs become variables in the design space (Eeckelaert 2005). Design space exploration of the system level can be also obtained by application of MOGA optimization techniques.…”