Efficient power macromodeling approach for an IP-based SoC system using discrete water cycle algorithm

Abstract

Low-power consumption is becoming a crucial concern that cannot be neglected in system-on-chip (SoC) designs. Low-power solutions help designers to provide a powerful methodology to analyze, estimate, and optimize today's power concerns. Early estimation of power at a high level reduces the redesign cycle and turn-around time.Power dissipation is a function of input patterns and their characteristics. This paper describes a power estimation technique by using predefined statistical characteristics-based input patterns, which gives the average power dissipation of individual intellectual property (IP) blocks and interconnects/buses in an SoC system design. During the power estimation phase, the discrete water cycle algorithm is implemented to generate optimized input patterns. Then Monte-Carlo zero-delay simulation approach is used for each individual IP block and buses at a high level. Total system power is the simple addition of average powers of IP blocks and buses. In experiments of entire IP-based SoC system with buses, our modified macromodel gives an average error of 7.91%. Accuracy of the proposed model is improved as compared to our previous model.

Efficient power macromodeling approach for heterogeneously stacked 3d ICs using Bio-geography based optimization

“…To further validate our model, we construct the IP-based test system by summing up the powers for individual IP blocks and buses. The test system-I is discussed in our previous work for IP-based single-core [ 25 ]. The test system is a 32-bit MIPS architecture having a different(six) number of IP blocks that are connected by different buses.…”

“…One of the most important concerns in the power macro-modeling is the choice of the model’s input parameters. They should capture the primary features that are responsible for the system’s power dissipation and thus it can have good accuracy in its power estimates [ 24 , 25 ]. We will focus on our problem of statistical power macro-modeling for IP-based 3D digital systems.…”