Efficient reconfigurable architectures for 3D medical image compression

Abstract

A AbstractRecently, the more widespread use of three-dimensional (3-D) imaging modalities, such as magnetic resonance imaging (MRI), computed tomography (CT), positron emission tomography (PET), and ultrasound (US) have generated a massive amount of volumetric data. These have provided an impetus to the development of other applications, in particular telemedicine and teleradiology. In these fields, medical image compression is important since both efficient storage and transmission of data In summary, this research is tackling the issues of massive 3-D medical volumes data that requires compression as well as hardware implementation to accelerate the slowest operations in the system. Results obtained also reveal a significant achievement in terms of the architecture efficiency and applications performance.

Dynamic partial reconfiguration of 2-D Haar wavelet transform (HWT) for face recognition systems

“…Partial reconfiguration concept appears after intialisation and works to modify a fraction of the resources by programming the FPGA with a partial bitstream file. Obviously, a full bitstream size is very massive whereas a partial bitstream may represents only 2% of the full bitstream [6], [13]. With smaller bitstreams, several advantages can be achieved: reduced reconfiguration time, reduced storage requirements, and dynamic allocation of functionality.…”

“…Xilinx FPGA device with dynamic partial reconfiguration (DPR) [5] technique has been selected to prototype the proposed architectures. With the ultimate goal to speed up the process of transforming input images into the wavelet coefficients, FPGA with the availability of advanced embedded resources such as soft cores, dedicated logic and block multipliers [6] is well suited.…”

A Self-Reconfigurable Platform for the Implementation of 2D Filterbanks with Real and Complex-Valued Inputs, Outputs, and Filter Coefficients

“…Most image processing systems rely on static architectures that cannot be modified at run-time. There has been, however, a number of works that make use of DPR in their image processing systems: a design that dynamically reconfigures discrete cosine transform (DCT) modules of various sizes [9], a dynamic systolic array accelerator for Kalman and wavelet filters [11], a fingerprint image processing hardware whose stages (e.g., segmentation, normalization, and smoothing) are time-multiplexed via DPR [12], a 3D Haar wavelet transform (HWT) implemented by dynamically reconfiguring a 1D HWT core thrice [13]. The work in [14] presents a pixel processor that reconfigures input/output widths, number of pixel processed in parallel, and the single-pixel operation.…”

Hardware and software architectures for computationally efficient three‐dimensional ultrasonic data compression

“…One of the main challenges is the huge amount of data acquired during scanning [4]. This imposes high storage within the system, which increases the size and cost tremendously [5]. This issue can be resolved only by compressing the data without losing the required information.…”