Efficient Reverse Converter Designs for the New 4-Moduli Sets &lt;formula formulatype="inline"&gt;&lt;tex Notation="TeX"&gt;$\{2^{n} -1, 2^{n}, 2^{n} +1, 2^{2n + 1}-1\}$&lt;/tex&gt;&lt;/formula&gt; and &lt;formula formulatype="inline"&gt; &lt;tex Notation="TeX"&gt;$\{2^{n} -1, 2^{n} +1, 2^{2n}, 2^{2n} +1\}$&lt;/tex&gt;&lt;/formula&gt; Based on New CRTs

Molahosseini, Amir Sabbagh; Navi, Keivan; Dadkhah, Chitra; Kavehei, Omid; Timarchi, Somayeh

doi:10.1109/tcsi.2009.2026681

Cited by 101 publications

(12 citation statements)

References 29 publications

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“…The hardware architecture of the proposed scheme is first realised by computing the MRDs of the two addends and according to (12) and (15) which parameters are defined in (13), (14), (16), (17) and (21). These MRDs are and , and in (4) which is equivalent to .…”

Section: Hardware Realisationmentioning

confidence: 99%

A Fault Tolerant Scheme for Detecting Overflow in Residue Number Microprocessors

Agbedemnab¹,

Agebure²,

Akobre³

2018

int. jour. eng. com. sci

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Abstract:The decomposition of larger numbers into smaller ones termed as residues is the main operation behind the concept of Residue Number System (RNS); it possesses inherent features such as parallelism and independent digit arithmetic computations. These features of the RNS has made it desirable for applications that require intensive computations such as Digital Signal Processing (DSP), Digital Filtering and Convolutions. Overflow detection is one of the major challenges that confront the efficient implementation of RNS in general purpose computer processors. Overflow occurs in RNS when an illegitimate value is represented within legitimate range -Dynamic Range (DR) as if it is legitimate value. This misrepresentation of results, which usually arises during addition operations ultimately affects systems built on this Number System. It is therefore imperative that steps are taken not to only detect but correct the occurrence of overflow whenever it occurs. In this paper, an additive overflow detection and correction scheme for the moduli set * + is presented. The scheme uses a redundant modulus to extend the DR of the moduli set. The proposed scheme is demonstrated theoretically to be an efficient scheme by comparing it to previous similar works.

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Section: Hardware Realisationmentioning

confidence: 99%

A Fault Tolerant Scheme for Detecting Overflow in Residue Number Microprocessors

Agbedemnab¹,

Agebure²,

Akobre³

2018

int. jour. eng. com. sci

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“…Based on those moduli sets, efficient reverse conversion algorithms, which give room for a widespread utilization of RNS in special purpose processors, have been proposed [17].…”

Section: Introductionmentioning

confidence: 99%

An effective New CRT based reverse converter for a novel moduli set {22n+1 − 1, 22n+1, 22n − 1}

Bankas¹,

Gbolagade²,

Cotofana

2013

2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors

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In this paper, a novel 3-moduli set 2 2n+1 − 1, 2 2n+1 , 2 2n − 1 , which has larger dynamic range when compared to other existing 3-moduli sets is proposed. After providing a proof that this moduli set always results in legitimate RNS, we subsequently propose an associated reverse converter based on the New Chinese Remainder Theorem. The proposed reverse converter has a delay of (4n + 6)tF A with an area cost of (8n + 2)F As and (4n − 2)HAs, where F A, HA, and tF A represent Full Adder, Half Adder, and delay of a Full Adder, respectively. We compared the proposed reverse converter with state of the art converters for similar or equal dynamic range RNS and our analysis indicate that for the same dynamic range the best converter requires (16n + 1)F As and exhibits a delay of (8n + 2)tF A. This indicates that, theoretically speaking, our proposal achieves about 37.5% area reduction and it is about 2 times faster than equivalent state of the art converters. Moreover, the product of the area with the square of the delay is improved up to about 84.4% over the state of the art.

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“…Nowadays, high-performance applications require larger dynamic range. Hence, high DR moduli sets such as {2 n -1, 2 n , 2 n +1, 2 2n+1 -1}, {2 n -1, 2 n +1, 2 2n , 2 2n +1} (Molahosseini et al, 2010), {2 n -1, 2 n , 2 n +1, 2 2n +1} (Cao et al, 2003) and {2 n -1, 2 n , 2 n +1, 2 n+1 -1, 2 n-1 -1} (Cao et al, 2007) were proposed.…”

Section: Introductionmentioning

confidence: 99%

Hybrid RNS-to-Binary Converter for the Moduli Set {22n, 2n-1, 2n+1, 2n+1-1}

Jassbi¹,

Molahosseini²

2013

RJASET

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The four-moduli Residue Number System (RNS) sets such as {2 n -1, 2 n , 2 n +1, 2 n+1 -1} have attracted a lot of researches during recent years. However, nowadays applications require higher dynamic range. This study introduces the RNS four-moduli set {2 2n , 2 n -1, 2 n +1, 2 n+1 -1} which is obtained by enhancing the moduli set {2 n -1, 2 n , 2 n +1, 2 n+1 -1}. This enhancement didn't increase the total speed of RNS arithmetic unit since the critical modulo in both of the moduli sets {2 n -1, 2 n , 2 n +1, 2 n+1 -1} and {2 2n , 2 n -1, 2 n +1, 2 n+1 -1} is 2 n +1. Besides, an efficient RNS-tobinary converter for the proposed moduli set is designed using a two-level architecture where a previous converter design for subset {2 2n , 2 n -1, 2 n +1} is used in the first level and then a two-channel Mixed-Radix Conversion (MRC) algorithm is considered to achieve the final result. Comparison with a recently introduced RNS-to-binary converter for a four-moduli set with the same dynamic range show that the proposed design results in higher speed.

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Cited by 101 publications

References 29 publications

A Fault Tolerant Scheme for Detecting Overflow in Residue Number Microprocessors

A Fault Tolerant Scheme for Detecting Overflow in Residue Number Microprocessors

An effective New CRT based reverse converter for a novel moduli set {2<sup>2n+1</sup> − 1, 2<sup>2n+1</sup>, 2<sup>2n</sup> − 1}

Hybrid RNS-to-Binary Converter for the Moduli Set {2<sup>2n</sup>, 2<sup>n</sup>-1, 2<sup>n</sup>+1, 2<sup>n+1<sup>-1}

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Cited by 101 publications

References 29 publications

A Fault Tolerant Scheme for Detecting Overflow in Residue Number Microprocessors

A Fault Tolerant Scheme for Detecting Overflow in Residue Number Microprocessors

An effective New CRT based reverse converter for a novel moduli set {2<sup>2n&#x002B;1</sup> &#x2212; 1, 2<sup>2n&#x002B;1</sup>, 2<sup>2n</sup> &#x2212; 1}

Hybrid RNS-to-Binary Converter for the Moduli Set {2<sup>2n</sup>, 2<sup>n</sup>-1, 2<sup>n</sup>+1, 2<sup>n+1<sup>-1}

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An effective New CRT based reverse converter for a novel moduli set {2<sup>2n+1</sup> − 1, 2<sup>2n+1</sup>, 2<sup>2n</sup> − 1}