Efficient systolic multiplications in composite fields for cryptographic systems

Abstract

Multiplications in finite fields are playing a key role in areas of cryptography and mathematic. We present approaches to exploit systolic architecture for multiplications in composite fields, which are expected to reduce the time-area product substantially. We design a pipelined architecture for multiplications in composite fields GF ((2 n) 2), where n is a positive integer. Besides, we design systolic architectures for multiplications and additions in finite fields GF (2 n). By integrating main improvements and other minor optimizations for multiplications in GF ((2 n) 2), the non-pipelined versions of our design takes 8n + 4 AND gates and 8n XOR gates to compute multiplications with the executing time of nT AN D + 4nT XOR , where T AN D and T XOR are delays of AND and XOR gates respectively; with the aid of pipelining, the pipelined version of our design has a throughput rate of one result per 2nT XOR. Other words, the time complexity and area complexity of our design are O(n). Thus, the complexity of time-area product of our design is O(n 2). Experimental results and comparisons show that our design provides significant reductions in executing time and area of multiplications. 2010 Mathematics Subject Classification. 12Y05.