Efficient time domain analogue fault simulation targeting nonlinear circuits

Analog Defect Injection and Fault Simulation Techniques: A Systematic Literature Review

“…The time-domain algorithm for fault simulation work in two iterative shells. One is the outer iteration that steps through [22] Fault modeling and simulation [23] Parametric fault simulation 2011 [24] Efficient time-domain simulation [25] Fault equivalence 2011 [26] Fault sensitivity analysis [27] Parametric variation 2011 [28] Fault sensitivity analysis [29] Behavioral level simulation 2012 [30] Fast fault simulation [31] Behavioral level simulation 2012 [32] Layout level defect injection [33] Fault sensitivity analysis 2012 [34] Inductive Fault analysis [35] High-level fault simulation 2013 [36] Numerical-based method [37] Parallel fault simulation 2013 [38] Inductive fault analysis [39] Tool for fault simulation 2013 [40] High-level fault simulation [9] Behavioral level simulation 2014 [41] Fault list compression technique [42] Multi-level hierarchical analogue fault simulation 2014 [43] Practical random sampling [44] Fast fault simulation for nonlinear analog circuits 2014 [45] Impedance calculation [46] [77] Macro modeling of analog components [78] Behavioral level fault simulation 2018 [79] Simulation at high abstraction level [80] Systematic method 2018 [81] Random sampling [82] Mixed-mode fault simulation 2019 [2] Likelihood-weighted random sampling of defects [83] Test point selection 2019 [84] Industrial Analog fault simulator [85] Analog fault injection and simulation interface 2019 ...…”

“…A nonlinear circuit equation is solved in each iteration of the NR method. A linear system is solved in each NR iteration with Lower-Upper (LU) factorization [24]. In [44], a new method for transient fault simulation for nonlinear analog circuits has been presented.…”