Efficient VLSI Implementation of $2^{{n}}$ Scaling of Signed Integer in RNS ${\{2^{n}-1, 2^{n},2^{n}+1\}}$

Abstract

Scaling is a problematic operation in ResidueNumber System (RNS) but a necessary evil in implementing many digital signal processing (DSP) algorithms for which RNS is particularly good. Existing signed integer RNS scalers entail a dedicated sign detection circuit, which is as complex as the magnitude scaling operation preceding it. In order to correct the incorrectly scaled negative integer in residue form, substantial hardware overheads have been incurred to detect the range of the residues upon magnitude scaling. In this paper, a fast and area efficient 2 n signed integer RNS scaler for the moduli set {2 n 1, 2 n , 2 n +1} is proposed. Complex sign detection circuit has been obviated and replaced by simple logic manipulation of some bit level information of intermediate magnitude scaling results. Comparing with the latest signed integer RNS scalers of comparable dynamic ranges, the proposed architecture achieves at least 21.6% of area saving, 28.8% of speedup and 32.5% of total power reduction for n ranges from 5 to 8.

Sign Detection and Number Comparison on RNS 3-Moduli Sets $$\{2^n-1, 2^{n+x}, 2^n+1\}$$ { 2 n - 1 , 2 n + x , 2 n + 1 }

“…[24] is supported on the CRT II, but is restricted to the traditional {2 n − 1, 2 n , 2 n + 1} moduli set, and the sign detector of [30] is underpinned by the moduli set {2 n+1 − 1, 2 n − 1, 2 n }. The particular properties of these moduli sets [10] have made them the most adopted, not only for sign identification and number comparison but also for scaling [23]. However, they only cover a limited DR. Sets providing larger DRs have been proposed, some with higher number of moduli [15,17], sometimes by extending the moduli beyond related power of two moduli [11], and also with 3-moduli sets with the augmented exponent of the power of two modulo [5].…”

Efficient programmable power‐of‐two scaler for the three‐moduli set {2 n + p , 2 n − 1, 2 n +1 − 1}

“…The hardware implementation technique is another criterion and can be classified into two groups. The hardware realization of the first group requires lookup tables [6][7][8][9][10][11][12]15,16], while the second group, which is known as adder-based implementation, uses combinational logic [3][4][5]13,14,[17][18][19][20]. The implementation of the former approach suffers from two main problems.…”

“…In [4], a high-performance, low-hardware-cost exact scaler was proposed for the three-moduli set {2 n − 1, 2 n , 2 n + 1}. A 2 n signed integer scaler, which is an extension of the method in [4], was proposed in [18] based on a low-complexity and high-performance hardware implementation. In [19], an efficient programmable power-of-two scaler was presented for the three-moduli set {2 n − 1, 2 n , 2 n + 1} to reduce the risk of over-scaling problems (ie, scaling more than necessary, which leads to unnecessary accuracy reduction).…”

New Residue Number System Scaler for the Three-Moduli Set {2n+1 − 1, 2n, 2n − 1}

“…The work that has been published so far regarding scaling the RNS deals either with moduli sets of general form or with the traditional set. The main scalers that deal specifically with the traditional moduli set M 2 = {2 n + 1, 2 n , 2 n − 1} are presented in [7][8][9][10][11][12][13]. Those that are most efficient in terms of different metrics are presented in [12,13].…”