Efficient Wideband mmW Transceiver Front End for 5G Base Stations in 22-nm FD-SOI CMOS

Elgaard, Christian; Özen, Mustafa; Westesson, Eric; Mahmoud, Ahmed; Torres, Florent; Reyaz, Shakila Bint; Forsberg, Therese; Akbar, Rehman; Hagberg, Hans; Sjöland, Henrik

doi:10.1109/jssc.2023.3282696

“…The use of cutting-edge technology such as discrete wavelet transform (DWT) [7] is essential to the success of today's communication networks in overcoming the challenges. By simulating and testing our suggested system using a Xilinx virtex-6 FPGA, we are able to recover signals at a data rate of 5 Gbps, proving that it is effective [8]. The dual-tree complex wavelet transform (DTCWT), is an adaptable piece of technology that may be utilised in a wide number of ways inside wireless communication systems by Ribeiro et al [9].…”

Section: Introductionmentioning

confidence: 88%

“…Considering in (8), which describes split DA logic, the input data represented as bkn is split into two parts of 4-bit each and is expressed mathematically as in (9).…”

Section: High-speed Distributed Arithmetic Structurementioning

confidence: 99%

“…In order to guarantee the correct recovery of broadcast signals, it is essential to conduct an analysis of the gains and losses that occur inside the RF system [2]. Because of their versatility, setup flexibility, and rapid processing speeds, field-programmable gate arrays (FPGAs) [3] have grown increasingly popular in recent years. There may be challenges involved in the hardware implementation of such systems [4].…”

Section: Introductionmentioning

confidence: 99%

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FPGA implementation of DTCWT architecture's high-speed DA structure for OFDM-based transceiver with CS

Sindgi,

Mahadevaswamy

2024

Bulletin EEI

0

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Communication systems at millimeter-wave (mm-wave) frequencies with high propagation losses use radio frequency (RF) budget analysis. RF system gains and losses ensure the receiver can recover the broadcast signal. Modern communication systems use compressive sensing (CS) and discrete wavelet transform (DWT). Hardware implementation is hard. Fieldprogrammable gate arrays (FPGA) adaptability, configurability, and processing speed make them popular. More mm-wave transceivers use FPGAs and advanced signal processing. FPGA-based mm-wave transceivers use compressed sensing and dual-tree complex wavelet transform (DTCWT). RF budget analysis recovers receiver signals. Energy and data efficiency transceivers have baseband processors, transmitters, and receivers. RF-to-mm-wave transmitter. Receiver demodulation and baseband conversion. CS and DTCWT processing modules boost baseband signal processing 5 Gbps Xilinx virtex-6 FPGAs. The system retrieves the signal while conserving power, according to simulations and testing. This study found that FPGA-based mm-wave transceivers can use advanced signal processing in future high-speed communication systems.

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“…Even though it is close to 100 years since its invention, first publication, and patent in 1936 by Willliam H. Doherty [1,2], it is still highly present in today's wireless systems, and in the research for tomorrow's. However, with the exception of two recently published papers [3] and [4], the published 5G mmW transceivers during recent years all focus on class AB PAs to support the tough linearity requirements that follow transmissions of wideband, high peak to average (PAR), orthogonal frequency division multiplexing (OFDM) signals with high order modulations [5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20]. A growing interest for deploying adaptive bias, i.e.…”

Section: Introductionmentioning

confidence: 99%

“…adjusting the bias of the power amplifier so that it follows the envelope of the modulated signal, is seen among mmW PA publications. Unfortunately, with the execption of [3], none of the PAs integrated in mmW frontends make use of the technique, but a few published standalone PAs do, and of these, some are class AB PAs [21][22][23] and some are Doherty amplifiers [24][25][26][27][28][29]. Gains brought by the adaptive bias are typically only evaluated for sinusoidal stimuli's, and [25,28,29] which reports good results for modulated signals in combination with adaptive bias, do not provide any evaluation or comparison to estimate the performance with and without the adaptive bias.…”

Section: Introductionmentioning

confidence: 99%

Analysis and Design of a GHz Bandwidth Adaptive Bias Circuit for an mmW Doherty Amplifier

Elgaard,

Sjoland

2024

Preprint

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This paper derives theoretical results for adaptive bias in Doherty amplifiers and presents the design and measurements of an integrated adaptive bias circuit tailored for high peak-to-average high bandwidth signals. Fundamental equations for output power, impedance, and efficiency of the complete Doherty amplifier are derived. Even with ideal transistor models, the Doherty amplifier is fundamentally nonlinear due to saturation of the main amplifier and class-C nonlinearity of the auxiliary. Increasing the transconductance of the auxiliary amplifier mitigates the distortion. Adaptive bias offers the possibility to control the output current characteristic of the auxiliary amplifier. This means that adaptive bias linearises and mitigates the need for an oversized auxiliary amplifier. Both methods, transconductance scaling and adaptive bias, are analysed and compared as well as having a band limited adaptive bias signal. The design of a multiple GHz bandwidth adaptive bias circuit is presented. To verify the circuit design and the theoretical predictions, an mmW Doherty amplifier in 22 nm CMOS-FD-SOI, utilizing the presented adaptive bias circuit, is measured and compared with and without adaptive bias. Comparison is conducted both using continuous-wave and modulated high bandwidth signals. Measured results confirm the predicted improvements by the adaptive bias as derived by the theoretical analysis.

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Analysis and design of a GHz bandwidth adaptive bias circuit for an mmW Doherty amplifier

Elgaard,

Sjöland

2024

Analog Integr Circ Sig Process

0

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This paper derives theoretical results for adaptive bias in Doherty amplifiers and presents the design and measurements of an integrated adaptive bias circuit tailored for high peak-to-average high bandwidth signals. Fundamental equations for output power, impedance, and efficiency of the complete Doherty amplifier are derived. Even with ideal transistor models, the Doherty amplifier is fundamentally nonlinear due to saturation of the main amplifier and class-C nonlinearity of the auxiliary. Increasing the transconductance of the auxiliary amplifier mitigates the distortion. Adaptive bias offers the possibility to control the output current characteristic of the auxiliary amplifier. This means that adaptive bias linearises and mitigates the need for an oversized auxiliary amplifier. Both methods, transconductance scaling and adaptive bias, are analysed and compared as well as having a band limited adaptive bias signal. The design of a multiple GHz bandwidth adaptive bias circuit is presented. To verify the circuit design and the theoretical predictions, an mmW Doherty amplifier in 22 nm CMOS-FD-SOI, utilizing the presented adaptive bias circuit, is measured and compared with and without adaptive bias. Comparison is conducted both using continuous-wave and modulated high bandwidth signals. Measured results confirm the predicted improvements by the adaptive bias as derived by the theoretical analysis.

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Efficient Wideband mmW Transceiver Front End for 5G Base Stations in 22-nm FD-SOI CMOS

Cited by 12 publications

References 33 publications

FPGA implementation of DTCWT architecture's high-speed DA structure for OFDM-based transceiver with CS

FPGA implementation of DTCWT architecture's high-speed DA structure for OFDM-based transceiver with CS

Analysis and Design of a GHz Bandwidth Adaptive Bias Circuit for an mmW Doherty Amplifier

Analysis and design of a GHz bandwidth adaptive bias circuit for an mmW Doherty amplifier

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