Efficient ZVT cell for interleaved DC–DC converters

Abstract

Interleaved DC-DC converters are extensively employed in high-power applications to reduce input/output current ripple, elements current stress, and improve reliability. In order to eliminate the switching losses in interleaved converters, zero voltage transition (ZVT) technique can be used. This study presents a new compact ZVT cell appropriate for interleaved converters. This cell employs a low number of elements while imposing no extra voltage and current stresses on the converter main semiconductors. The proposed cell is applied to an interleaved boost converter to achieve full soft switching feature. The resulting ZVT interleaved boost converter is completely analysed and its design procedure is provided. Also, the converter is compared with the latest prominent counterparts presented in literature. Besides, its operation and theoretical analysis are validated by a 200 W and 100 kHz prototype. Finally, the proposed ZVT cell is applied to other types of interleaved converters and a family of ZVT interleaved converters is introduced.

Soft‐switching non‐isolated high step‐up three‐level boost converter using single magnetic element

“…Figure 6 shows the voltage gain comparison of the proposed converter with converters presented in [6,14,15,20,27]. As it is clear, the proposed converter provides higher voltage gain than the other three references in [6,20,27] while presenting soft switching performance, low voltage stress and a single magnetic core. Although the FIGURE 6 Voltage gain comparison of the proposed converter with other converters in [6,14,15,20,27] (n = 1 and k = 1) FIGURE 7 Voltage stress of the main switch in the proposed converter compared with converters in [6,14,15,27] proposed converter has a lower voltage gain than the converters in [14,15], it has lower components in comparison to its counterparts.…”

“…With n = 1, the voltage stress across the main switches is one-sixth of the output voltage which is very low. In the proposed converter, the voltage stress of the main switches is halved in comparison to converters in [6,14,15,27]. This allows using low voltage power switches with small on-resistance that reduces conduction losses.…”

An interleaved ZVS ultra‐large gain converter for sustainable energy systems applications

“…Although the ZCS turn-ON is provided for MOSFETs through the leakage inductances of CI and/or BIT; however, this can not minimize the turn-ON losses. At higher switching frequency in which the size of the components is considerably decreased, the zero voltage switching (ZVS) is a promising solution to reduce the switching losses [49][50][51][52][53][54][55][56][57][58][59][60] that can be achieved by an active clam rather than passive clamp in [30][31][32][33][34][35][36][37][38][39][40][41][42][43][44][45][46][47][48]. The active clamp scheme is introduced to satisfy ZVS performance for the main and auxiliary MOSFETs in an interleaved transformerless converter with Dickson VMCs [49].…”

“…However, additional cores are needed and also too many components should be implemented to increase voltage gain. In the contrary, the leakage inductances of CI or BIT in the converters of [50][51][52][53][54][55][56][57][58][59][60] acts the role of that auxiliary inductors in [49]. Generally, the active clamp consists of a clamp capacitor and an auxiliary MOSFET that is simply connected across the main switch [50-55, 59, 60].…”

“…It is clear that the clamp circuit has a complicated structure with too many diodes. A similar concept is also presented in [57]. The clamp circuit is participated in voltage gain extension in a lift circuit scheme connected to the output side of the converter [58].…”