Electric Double-Layer Gating of Two-Dimensional Field-Effect Transistors Using a Single-Ion Conductor

Xu, Ke; Liang, Jierui; Woeppel, Aaron; Bostian, M. Eli; Ding, Hangjun; Chao, Zhongmou; McKone, James R.; Beckman, Eric J.; Fullerton‐Shirey, Susan K.

doi:10.1021/acsami.9b11526

Cited by 23 publications

(42 citation statements)

References 46 publications

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“…Line scans at the same location before and after cleaning indicate a channel thickness of~1.2 nm (four layers) and~2.2 nm of removed residue. The roughness of the channel surface was reduced from 1.32 ± 0.14 nm to 0.23 ± 0.02 nm after AFM cleaning, which is close to the surface roughness for freshly cleaved graphene on SiO 2 [36,51,55]. Note that the maximum current and mobility are not degraded after AFM cleaning -in accordance with our prior reports [33,56].…”

Section: Resultssupporting

confidence: 88%

“…The samples were transferred back to the probe station to form the p-n junctions. Programming voltages on electrodes 1 and 4 (V 1 = +1 V; V 4 = −1 V) were held for 10 min to drive ions into position, and the device was then cooled to 220 K which is below the T g of PEO electrolyte (~242 K [29,51]) at a cooling rate of 0.7 K/min to immobilize ions and to fix the p-n junction with programming voltage still applied. The temperature was controlled by a Lakeshore 365 temperature controller to within ± 0.01 K. Once 220 K was reached, the sample was held at 5 min prior to the measurement to establish thermal equilibrium.…”

Section: Electrolyte Preparationmentioning

confidence: 99%

“…Schematics showing the mechanism are provided in Figure 3a, following the same general procedure as described in Figure 1. Voltage was applied to electrodes 1 and 4 (with electrodes 2, 3 and the back gate floated) at room temperature where the ions were mobile (T g~2 42 K) [51] to create the p-n junction. While continuing to apply the voltages, the device was cooled to 220 K (i.e., T < T g ), which was sufficient to immobilize the ions and lock the EDLs [29,31].…”

Section: P-n Junction Formation Using Peo:csclomentioning

confidence: 99%

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Ion-Locking in Solid Polymer Electrolytes for Reconfigurable Gateless Lateral Graphene p-n Junctions

Liang

Arora

et al. 2020

Materials

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A gateless lateral p-n junction with reconfigurability is demonstrated on graphene by ion-locking using solid polymer electrolytes. Ions in the electrolytes are used to configure electric-double-layers (EDLs) that induce pand n-type regions in graphene. These EDLs are locked in place by two different electrolytes with distinct mechanisms: (1) a polyethylene oxide (PEO)-based electrolyte, PEO:CsClO 4 , is locked by thermal quenching (i.e., operating temperature < T g (glass transition temperature)), and (2) a custom-synthesized, doubly-polymerizable ionic liquid (DPIL) is locked by thermally triggered polymerization that enables room temperature operation. Both approaches are gateless because only the source/drain terminals are required to create the junction, and both show two current minima in the backgated transfer measurements, which is a signature of a graphene p-n junction. The PEO:CsClO 4 gated p-n junction is reconfigured to n-p by resetting the device at room temperature, reprogramming, and cooling to T < T g . These results show an alternate approach to locking EDLs on 2D devices and suggest a path forward to reconfigurable, gateless lateral p-n junctions with potential applications in polymorphic logic circuits.

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Section: Resultssupporting

confidence: 88%

Section: Electrolyte Preparationmentioning

confidence: 99%

Section: P-n Junction Formation Using Peo:csclomentioning

confidence: 99%

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Ion-Locking in Solid Polymer Electrolytes for Reconfigurable Gateless Lateral Graphene p-n Junctions

Liang

Arora

et al. 2020

Materials

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“… 51 One method to ensure electrostatic gating while maintaining the benefits of high capacitances from electrolyte gating is the use of single-ion conductors which, when properly paired with an appropriate semiconductor, will result in only electrostatic gating. 52 Furthermore, Fullerton-Shirey and co-workers have shown single-ion conductors (a mobile cation paired with a p-type semicondcuctor) can achieve charge carrier densities in OTFTs of equivalent magnitude to that of dual ion conductors. 53 In this study, top-gate top-contact (TGTC) transistors were fabricated using P50/50-6 ( Table 1 ), a poly(S)- b -poly(VBBI + [X]- r -PEGMA) materials functionalized with either [X] = TFSI – , PF 6 – , or BF 4 – as the mobile anions; gold contacts, and solution processable poly{[N,N′-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5′-(2,2′-bithiophene)} (poly(NDI2OD-T2)) 54 n-type semiconductor ( Figure 6 , Table S4 ).…”

Section: Resultsmentioning

confidence: 99%

Ionic Liquid Containing Block Copolymer Dielectrics: Designing for High-Frequency Capacitance, Low-Voltage Operation, and Fast Switching Speeds

Peltekoff

Brixi

Niskanen

et al. 2021

JACS Au

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Polymerized ionic liquids (PILs) are a potential solution to the large-scale production of low-power consuming organic thin-film transistors (OTFTs). When used as the device gating medium in OTFTs, PILs experience a double-layer capacitance that enables thickness independent, low-voltage operation. PIL microstructure, polymer composition, and choice of anion have all been reported to have an effect on device performance, but a better structure property relationship is still required. A library of 27 well-defined, poly(styrene) -b- poly(1-(4-vinylbenzyl)-3-butylimidazolium- random -poly(ethylene glycol) methyl ether methacrylate) (poly(S)- b -poly(VBBI + [X]- r -PEGMA)) block copolymers, with varying PEGMA/VBBI + ratios and three different mobile anions (where X = TFSI – , PF 6 – or BF 4 – ), were synthesized, characterized and integrated into OTFTs. The fraction of VBBI + in the poly(VBBI + [X]- r -PEGMA) block ranged from to 100 mol % and led to glass transition temperatures ( T g ) between −7 and 55 °C for that block. When VBBI + composition was equal or above 50 mol %, the block copolymer self-assembled into well-ordered domains with sizes between 22 and 52 nm, depending on the composition and choice of anion. The block copolymers double-layer capacitance ( C DL ) and ionic conductivity (σ) were found to correlate to the polymer self-assembly and the T g of the poly(VBBI + [X]- r -PEGMA) block. Finally, the block copolymers were integrated into OTFTs as the gating medium that led to n-type devices with threshold voltages of 0.5–1.5 V while maintaining good electron mobilities. We also found that the greater the σ of the PIL, the greater the OTFT operating frequency could reach. However, we also found that C DL is not strictly proportional to OTFT output currents.

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confidence: 99%

CNSi/MXene/CNSi: Unique Structure with Specific Electronic Properties for Nanodevices

Bai

et al. 2021

Small

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nanodevices and the next generation of integrated circuits (IC). [3,[6][7][8] For example, graphene has been widely studied for its application into nanodevices because of its excellent electron mobility. [9][10][11][12] But, how to achieve semiconducting one for IC on large scale is still a challenging issue. [13,14] 2D transitional metal dichalcogenides (TMDs) have also attracted extensive attention for their applications into nanodevices because of the high stability and intrinsic semiconducting property. [6,15,16] For example, MoS 2 -based nano Field-Effect Transistor (FET) had been experimentally fabricated. [17] However, additional electrodes have to be added into the device, leading to extra cost, contact resistance [18][19][20][21] and difficulty for commercial application.It is well-known that a device is composed of semiconducting and metallic parts. To construct the device with 2D materials, we need to stack 2D materials with different conducting characteristics together in most cases to form heterostructures, where the 2D materials are mainly bonded together by van der Waals (vdW) interaction. [22][23][24][25] For example, MoS 2 and graphene were combined by vdW force to form a heterostructure for application in nanodevices. [6,26] However, the process not only results in complicity of fabrication, but also the uncertainty of device's 2D materials have been interesting for applications into nanodevices due to their intriguing physical properties. In this work, four types of unique structures are designed that are composed of MXenes and C/N-Si layers (CNSi), where MXene is sandwiched by the CNSi layers with different thicknesses, for their practical applications into integrated devices. The systematic calculations on their elastic constants, phonon dispersions, and thermodynamic properties show that these structures are stable, depending on the composition of MXene. It is found: 1) different from MXene or N-functionalized MXene (M 2 CN 2 ), SiN 2 /M 2 X/SiN 2 possess new electronic properties with free carriers only in the middle, leading to 2D free electron gas; 2) CNSi/MXene/ CNSi shows an intrinsic Ohmic semiconductor-metal-semiconductor (S-M-S) contact, which is potential for applications into nanodevices; and 3) O/M 2 C/ SiN 2 and N/M 2 C/OSiN are also stable and show different electronic properties, which can be semiconductor or metal as a whole depending on the interface. A method is further proposed to fabricate the 2D structures based on the industrial availability. The findings may provide a novel strategy to design and fabricate the 2D structures for their application into nanodevices and integrated circuits.The ORCID identification number(s) for the author(s) of this article can be found under https://doi.org/10.1002/smll.202101482.

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Electric Double-Layer Gating of Two-Dimensional Field-Effect Transistors Using a Single-Ion Conductor

Cited by 23 publications

References 46 publications

Ion-Locking in Solid Polymer Electrolytes for Reconfigurable Gateless Lateral Graphene p-n Junctions

Ion-Locking in Solid Polymer Electrolytes for Reconfigurable Gateless Lateral Graphene p-n Junctions

Ionic Liquid Containing Block Copolymer Dielectrics: Designing for High-Frequency Capacitance, Low-Voltage Operation, and Fast Switching Speeds

CNSi/MXene/CNSi: Unique Structure with Specific Electronic Properties for Nanodevices

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