Electrical Characteristics of Low-Temperature Poly-Silicon Thin-Film Transistor Using a Stacked Pr2O3/SiOxNy Gate Dielectric

Abstract

In this paper, we have developed a stacked Pr 2 O 3 /SiO x N y gate dielectric into low-temperature poly-Si thin-film transistors (TFTs).High-performance TFT devices can be achieved including a high effective carrier mobility, high driving current, small subthreshold swing, and high I ON /I OFF current ratio. This phenomenon is attributed to the smooth Pr 2 O 3 /poly-Si interface and the low interface trap density provided by N 2 O plasma treatment. The presence of an SiO x N y buffer layer also enhanced the electrical reliability of the Pr 2 O 3 /poly-Si TFT.All of these results suggest that a high-k Pr 2 O 3 gate dielectric prepared the buffer layer is a good candidate for high-performance TFTs.