19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems 2010
DOI: 10.1109/epeps.2010.5642596
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Electrical characterization of annular through silicon vias for a reconfigurable wafer-sized circuit board

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Cited by 7 publications
(2 citation statements)
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“…TSVs also provide Joint Test Action Group signals to configure the WaferIC internal circuitry prior to operation. The electrical characterization of TSVs at wafer level used for this application was done in [6]. PowerBlocks are attached to the backside wafer by a flip-chip process and are constituted of an array of miniature PCBs that integrate regulators to supply dc power to the backside wafer.…”
Section: Introductionmentioning
confidence: 99%
“…TSVs also provide Joint Test Action Group signals to configure the WaferIC internal circuitry prior to operation. The electrical characterization of TSVs at wafer level used for this application was done in [6]. PowerBlocks are attached to the backside wafer by a flip-chip process and are constituted of an array of miniature PCBs that integrate regulators to supply dc power to the backside wafer.…”
Section: Introductionmentioning
confidence: 99%
“…As depicted in figure 1(b), the top surface of the active wafer is covered by an anisotropic conductive film (ACF). This anisotropic Z-axis film comprises as many as 80 million conductive fibers (BtechCorp, 2011, Diop, 2010. It establishes electrical contact between the NanoPads and the balls of ICs deposited on the surface by the user.…”
Section: Introductionmentioning
confidence: 99%