Electrical characterization of MOS capacitors with SiO/sub 2/-TiO/sub 2/ dielectric stack made by room temperature plasma oxidation

Abstract

In this paper, we present current-voltage characterization as function of temperature (IVT), of MOS capacitors with dielectric layers of SiO 2 , TiO 2 and with SiO 2 -TiO 2 dielectric stack, made by room temperature plasma oxidation. It is shown that in structures where only TiO 2 was grown, the main conduction mechanism is thermoionic emission. However, in this case, an interfacial layer was inevitably formed. This layer is probably a bad quality SiO 2 , with k<3.9 and thicker than expected, which reduces the value of the effective dynamic dielectric constant. The barrier height was around 0.8 eV. For the stack dielectric structure, a similar barrier height was found, but in addition, a good agreement was obtained for the value of equivalent dynamic dielectric constant obtained from measurements with the calculated one, considering the measured thickness and the estimated dielectric constants of the two stacked layers. It was also verified that the Poole-Frenkel conduction mechanism is not present in any of the samples. For values of equivalent thickness below 2 nm, the barrier height obtained for stacked layers provides more than 2 order of gate current density smaller than the observed for SiO 2 layers only with similar thickness.