Electrical models of through silicon Vias and silicon‐based devices for millimeter‐wave application

Abstract

As the short vertical interconnections can significantly shorten the interconnect length between different circuits, three‐dimensional integrated circuits (3D ICs) based on the through‐silicon via (TSV) technology are considered as one of the most promising alternatives to overcome the scaling limits of Moore's low. Moreover, as the silicon technologies have been progressively expanded into the millimeter‐wave (mmW) realm, the TSV technology also provides a promising option to realize a compact system with high performance and operating frequencies. This article provides an overview of recent advances in the development of TSV technologies and silicon‐based passive devices for mmW applications. As various kinds of TSV losses are detrimental to the electrical performance of 3D ICs, especially in mmW systems, TSVs exploiting novel structures and materials still needs much more research, making it possible to integrate the passive device on 3D ICs and providing a promising option to realize a compact mmW system with excellent electrical performance and system reliability.

Assessment of through‐silicon‐vias with different configurations of ground vias and accounting for substrate losses

“…5 For this reason, the electrical properties that influence signal propagation through these structures have been thoroughly studied using both, electromagnetic (EM) simulations, 6,7 and equivalent circuit representations. 8,9 However, in some cases, the corresponding analyses have been limited to represent a simple array of TSVs consisting of one signal via, and one or two ground vias serving as the return path 10 ; in others that include arrays with multiple ground vias, the model parameters are not extracted using S-parameters but using the dimensions and physical parameters of the TSVs, 11 while in others the S-parameters are used to extract only the equivalent circuit for the resistance and inductance of the TSVs. [12][13] Motivated by this, here, systematically performed 3D EM simulations allow to develop a parameter extraction strategy to implement an equivalent circuit model that can be concatenated to represent TSVs crossing a stack of several chips.…”