Electrochemical Impedance Spectroscopy (EIS) Analysis of BTA Removal by TMAH during Post Cu CMP Cleaning Process

Venkatesh, R.; Cho, Byoung Jun; Ramanathan, Surash; Park, Jin-Goo

doi:10.1149/2.014211jes

Cited by 32 publications

(23 citation statements)

References 24 publications

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“…168,170 The use of a TMAH-based solution for removing BTA from the Cu surface is suggested in the literature. 168,[171][172][173] Less corrosion of Cu in TMAH solution than in NH 4 OH solution even at higher pH is reported in the literature. 172 Electrochemical impedance spectroscopy (EIS) analysis of Cu post-CMP is studied in the literature.…”

Section: Application-based Post-cmp Cleaningmentioning

confidence: 91%

“…172 Electrochemical impedance spectroscopy (EIS) analysis of Cu post-CMP is studied in the literature. [173][174][175] EIS investigation revealed that the minimum concentration of 0.5 wt% TMAH is sufficient to remove BTA from the Cu surface. 173 However, TMAH is a harmful chemical for human health and the environment.…”

Section: Application-based Post-cmp Cleaningmentioning

confidence: 99%

“…[173][174][175] EIS investigation revealed that the minimum concentration of 0.5 wt% TMAH is sufficient to remove BTA from the Cu surface. 173 However, TMAH is a harmful chemical for human health and the environment. 81 Non-amine-based solutions, cesium hydroxide, and ethylene glycol were proposed by Manivanan et al 175 for the removal of BTA from the Cu surface.…”

Section: Application-based Post-cmp Cleaningmentioning

confidence: 99%

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Review—Post-Chemical Mechanical Planarization Cleaning Technology

Hazarika,

Gupta,

Rajaraman

2023

ECS J. Solid State Sci. Technol.

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Chemical mechanical planarization (CMP), a commonly employed process for attaining local and global planarization in integrated circuits fabrication, leaves contaminants and defects on the surface polished. Due to the miniaturization of devices, new materials/ processes for the fabrication of IC circuits are considered, introducing new post-CMP issues. As such, understanding of post-CMP cleaning process is critical to choose an appropriate method for the given material. Here, the types of contaminants and defects generated during the post-CMP process and the issues related to it are discussed. The different physical and chemical cleaning methods employed in the post-CMP cleaning process to eradicate these defects are elucidated.In particular, the PVA brushing method, which is currently preferred, is elaborated upon in detail. The various chemistries, including the newly suggested ones in recent years for cleaning different substrates, are summarized. The post-CMP cleaning methods for various materials such as Cu, Al, W, Co, Ru, InGaAs, Ge, and SiO2 are mainly addressed here. This review also provides the direction of progress for the post-CMP cleaning process in terms of evolution of new techniques and chemistries for the next generation of materials.

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Section: Application-based Post-cmp Cleaningmentioning

confidence: 91%

Section: Application-based Post-cmp Cleaningmentioning

confidence: 99%

Section: Application-based Post-cmp Cleaningmentioning

confidence: 99%

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Review—Post-Chemical Mechanical Planarization Cleaning Technology

Hazarika,

Gupta,

Rajaraman

2023

ECS J. Solid State Sci. Technol.

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Section: Trends and Current Statusmentioning

confidence: 99%

“…43,44 Since surface passivation is an indicator of post-CMP residual adsorbates (like corrosion inhibitors), the efficiency of a PCMPC process can be checked by comparing i corr , LPR and/or A.C. impedance data recorded before and after surface cleaning. 45 Inclusion of microscopic scrutiny can additionally complement these findings. 46,47 New Challenges and Future Directions Further narrowing of process windows and new considerations of defect control are likely to add more CMP challenges for the ≤ 10 nm node integration.…”

Section: P211mentioning

confidence: 99%

Perspective—Electrochemical Assessment of Slurry Formulations for Chemical Mechanical Planarization of Metals: Trends, Benefits and Challenges

Roy¹

2018

ECS J. Solid State Sci. Technol.

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With continued shrinkage of circuit dimensions, the technique of chemical mechanical planarization (CMP) has become progressively more intricate through the last decade. Since the chemical mechanism of metal CMP is governed by electrochemical effects, the complex task of CMP-slurry engineering can be economically assisted in the electroanalytical approach by using laboratory scale model systems. This article discusses how CMP has been impacted by device scaling, and examines the status of fundamental studies of metal CMP. The techniques suitable for studying model CMP systems are discussed, along with an assessment of the utilities and the practical limits of such experiments. Chemical mechanical planarization (CMP) is an essential processing step of integrated circuit (IC) fabrication. 1,2 CMP of the metal components of logic devices constitute a major aspect of this technique and, like other areas of IC manufacturing, metal CMP has become quite complex while addressing the emerging demands of technology through the last decade. 3 The new challenges of metal CMP originate from both the scaling and the novel material aspects of these systems. 3,4 At the same time, published reports indicate that, many of these issues, especially those related to the slurry consumables, 5 can be addressed to a large extent through electroanalytical examinations of slurry functions using scaled down models of actual CMP systems. 6 Recent studies performed in industrial facilities have also identified a critical need to further advance the fundamental understanding of metal CMP. 7,8 The present article provides a perspective on these fundamental research aspects of metal CMP that are in the core of most laboratory scale studies of these systems. Device Scaling and CMP ConsiderationsThe International Technology Roadmap for Semiconductors (ITRS) specified the earlier technology nodes in terms of the DRAM half-pitch (hp), or the microprocessor's level-1 metal hp of a device. 9 Basically until the 65 nm node, the shrinkage of feature-size has continued in line with Dennard scaling, by a factor (S) of 1/ √ 2, to accommodate doubling of transistors per unit chip area (scaling as S 2 = 1/2) every two years in relation to Moore's law. 10 Increased leakage currents in the subsequent feature reductions have eventually shifted this technology trend, with the emergence of advanced multicore systems. 11 While the scaling factor of 1/ √ 2 has been largely maintained in the post-Dennard period, the newer logic devices have evolved in a more complex manner compared to their earlier counterparts. The middle-of-line (MOL) metallization scheme has emerged from the need to reduce the parasitic effects of active wiring that extends over 4 km cm −2 for >13 metal layers. 9 Novel diffusion barriers and ultra-low-k (ULK) dielectrics, Fin field effect transistors (Fin-FETs), high-k gate dielectrics, and exploratory designs/materials for local interconnects have been steadily incorporated in new device architectures in keeping with the advents of scaling sch...

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Electrochemical techniques and their applications for chemical mechanical planarization (CMP) of metal films

Roy

2016

Advances in Chemical Mechanical Planarization (CMP)

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Electrochemical Impedance Spectroscopy (EIS) Analysis of BTA Removal by TMAH during Post Cu CMP Cleaning Process

Cited by 32 publications

References 24 publications

Review—Post-Chemical Mechanical Planarization Cleaning Technology

Review—Post-Chemical Mechanical Planarization Cleaning Technology

Perspective—Electrochemical Assessment of Slurry Formulations for Chemical Mechanical Planarization of Metals: Trends, Benefits and Challenges

Electrochemical techniques and their applications for chemical mechanical planarization (CMP) of metal films

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