Electrochemical simulation of filament growth and dissolution in conductive-bridging RAM (CBRAM) with cylindrical coordinates

Lin, Sen; Zhao, Liang; Zhang, Jinyu; Wu, Huayue; Wang, Yan; Qian, He

doi:10.1109/iedm.2012.6479107

Cited by 18 publications

(16 citation statements)

References 10 publications

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“…The CF growth rate becomes infinitely large because of the infinite ion migration speed when l(t) approaches L, which is evidently unphysical. The t p (V a ) exponential relationship predicted by (9) is not supported by experimental data. We propose anode-oxidation limited reaction mechanism to avoid above singular point in CF HFG.…”

Section: Model Verification and Discussioncontrasting

confidence: 62%

“…In this paper, we take Ag/GeS 2 /W as a model cell of anode/electrolyte/cathode layered structure [7], [8]. The latest research from our group [9] confirms that the forming process is decided by three physical processes in unison: 1) metal oxidation in the anode; 2) cation migration from the anode to cathode; and 3) metal reduction in the cathode. These forming processes have to be characterized quantitatively.…”

Section: Introductionmentioning

confidence: 58%

“…In this paper, we attribute such a phenomenon to the initial cation migration. In [5], when the CF growth approaches the anode, a singular point exists in (9). The CF growth rate becomes infinitely large because of the infinite ion migration speed when l(t) approaches L, which is evidently unphysical.…”

Section: Model Verification and Discussionmentioning

confidence: 99%

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An Analytical Model for the Forming Process of Conductive-Bridge Resistive-Switching Random-Access Memory

Wang

Zhang

et al. 2014

IEEE Trans. Electron Devices

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An analytical model for the forming process of conductive-bridge resistive-switching random-access memory is developed. The measurable forming time can be calculated using this model giving the biasing condition and is verified to be correct through comparison with the experimental data. The forming time has been shown to have multiple-slopes in exponential dependence on the applied voltage, in agreement with measurement. The model is based on the identification of three steps in the forming process: 1) metal oxidation at the anode; 2) cation migration toward the cathode; and 3) backward filament growth due to electroplating from the cathode. The accuracy of the model has also been established via numerical simulation.Index Terms-Analytic model, conductive-bridge resistiveswitching random-access memory (CBRAM), filament growth.

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Section: Model Verification and Discussioncontrasting

confidence: 62%

Section: Introductionmentioning

confidence: 58%

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An Analytical Model for the Forming Process of Conductive-Bridge Resistive-Switching Random-Access Memory

Wang

Zhang

et al. 2014

IEEE Trans. Electron Devices

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“…The ON/OFF ratio was highly enhanced by inserting Au NPs in the device, which made it very easy to distinguish the storage information ("1" or "0") due to the high memory window margin and is benefi cial to the multilevel switching resistive memory for high density data storage. In a generally accepted theory, [ 18,44 ] the evolution of the CF shape during switching can explain the difference change in OFF state: a narrower/wider depleted gap length between the electrode and CF tip leads to higher/lower current at the OFF state, as shown in Figure 3 c,d.…”

Section: Electrical Performance Evaluationsmentioning

confidence: 97%

Amorphous‐Si‐Based Resistive Switching Memories with Highly Reduced Electroforming Voltage and Enlarged Memory Window

Qian

Nguyen

Chen

et al. 2016

Adv Elect Materials

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(CFs) formation/rupture within the insulating layer leads to the resistive switching in RRAM, which can offer the possibility to scale down the memory device to less than 10 nm. [ 2,15,16,23 ] In order to activate the fresh resistive memory into switching states, the electroforming process, which usually adopts a higher voltage than the usual operation voltage, is needed to form the localized semipermanent conductive fi lament inside the active materials. [ 8,16,23 ] However, the device yield and the switching performance would be limited with high electroforming voltage which may cause permanent damage to the RRAM. [ 16,24,25 ] In addition, the integration potential of the crossbar array confi guration could also be restricted by the electroforming process. [ 26 ] On the other hand, increasing demand for high density data storage with continuous downscaling has triggered research attention towards multilevel RRAM which offers an opportunity to store more than 2-bits in a single cell. [ 27,28 ] Therefore, a large ON/OFF ratio of different resistive states is generally required to keep the stable operation of multilevel switching, [ 29,30 ] and it is also an important feature for the resistive memory to avoid misreading during the device operation.Several propositions have been developed to reduce the electroforming voltage with the improvement of the switching performances. [ 7,8,11,31,32 ] However, these methods commonly involve relatively complex fabrication process [ 8,11 ] or require high temperature for thermal annealing treatment [ 7,32 ] which may degrade the previously deposited selector or diode performance and are not suitable for stackable integration. [ 9,33 ] Furthermore, the high temperature processes are also not suitable to fabricate memory devices on the thermal instability fl exible substrates. [ 34,35 ] On the other hand, to increase the ON/OFF ratio of resistive switching memory, some methods have been developed. [ 25,29,36,37 ] For example, the ON/OFF ratio can be increased by doping boron (B) atoms into carbon nanotubes [ 29 ] or manganese (Mn) atoms into ZnO thin fi lm, [ 37 ] of which the fabrication processes are complicated and not easy to control.In order to meet the desirable requirements of (a) lowering the electroforming voltage ( V forming ) and (b) enhancing the ON/ OFF ratio, a simple approach was proposed. In this report, the Amorphous Si (a-Si) based memory devices that offer signifi cant improvement in switching performance are fabricated by inserting a gold nanoparticles (Au NPs) monolayer between the amorphous Si and inert bottom electrodes. It is demonstrated that the Au NPs-interlayer amorphous Si memory devices deliver great improvements in lowering the electroforming voltage as well as enhancing the ON/OFF ratio, as compared to a pure amorphous Si memory structure. The switching mechanism is due to the modifi ed electric fi eld distribution with the insertion of Au NPs, which can directly affect the dynamic transport of ions and lead to the change of fi lament growth. T...

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“…This is due to the extremely challenging local characterization and to the 3D-nature of the CF. So far, attempts using in-situ TEM, C-AFM, EDX (5)(6)(7)(8) have obtained the observation of the CF only on dedicated test structures. In this paper, for the first time, we unveil the 3D-structure of a conductive filament (CF) for a scaled 1T1R memory element using C-AFM tomography.…”

Section: Introductionmentioning

confidence: 99%

Conductive-AFM tomography for 3D filament observation in resistive switching devices

Celano

Goux

Belmonte

et al. 2013

2013 IEEE International Electron Devices Meeting

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Electrochemical simulation of filament growth and dissolution in conductive-bridging RAM (CBRAM) with cylindrical coordinates

Cited by 18 publications

References 10 publications

An Analytical Model for the Forming Process of Conductive-Bridge Resistive-Switching Random-Access Memory

An Analytical Model for the Forming Process of Conductive-Bridge Resistive-Switching Random-Access Memory

Amorphous‐Si‐Based Resistive Switching Memories with Highly Reduced Electroforming Voltage and Enlarged Memory Window

Conductive-AFM tomography for 3D filament observation in resistive switching devices

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