Determination of the electrical properties of 1D semiconductor nanostructures is important for material and growth process development as well as for further nanodevice design. Gate-dependent electrical-transport measurements of singlenanowire field-effect transistors (FETs) have been employed to investigate the electrical-transport properties of semiconductor nanowires.[ Apart from the Hall effect measurement for thin-film semiconductor materials, the capacitance-voltage (C-V) measurement is an alternative method of determining the doping concentrations in semiconductors. [5][6][7] Schottky or pn junctions, in which one side of the junction is much more heavily doped than the other side, are employed for C-V analysis. A fixed dc reverse bias with a small ac voltage superimposed on it is applied to the sample to measure the junction capacitance at a fixed frequency. The inverse capacitance squared is a linear function of the applied reverse-biased voltage; from this the built-in potential of the junction and the carrier concentration of the lightly doped side can be estimated from the intercept and the slope, respectively. [5] This Mott-Schottky approach is also taken when a Schottky barrier is formed at the interface of the semiconductor film and electrolyte to monitor the carrier concentrations of the semiconductor electrodes. [8][9][10] C-V