Eliminating Periodic Flush Overhead of File I/O with Non-Volatile Buffer Cache

Lee, Eunji; Kang, Hyo-Jung; Bahn, Hyokyung; Shin, Kang G.

doi:10.1109/tc.2014.2349525

Cited by 29 publications

(25 citation statements)

References 27 publications

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“…Patents published by Intel describe a detailed micro-architecture to support non-volatile memory in the storage hierarchy of computer systems, implying that the era of non-volatile memory is imminent [24], [25]. However, as non-volatile memory will not replace DRAM due to cost and/or performance, it is considered only as an add-on component to enhance performances [17], [18], [27], [28].…”

Section: A the New Swap Architecturementioning

confidence: 99%

Analysis of Smartphone I/O Characteristics — Toward Efficient Swap in a Smartphone

Kim¹,

Bahn²

2019

IEEE Access

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Section: A the New Swap Architecturementioning

confidence: 99%

Analysis of Smartphone I/O Characteristics — Toward Efficient Swap in a Smartphone

Kim¹,

Bahn²

2019

IEEE Access

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“…Non-volatile memory (NVM) has been considered as a new memory medium to reduce the energy consumption of DRAM memory. Specifically, NVM allows the byteaddressability similar to DRAM, but it spends less energy than DRAM because NVM does not need to perform refresh of cells due to its non-volatile characteristics [31]. However, write operations on NVM are vulnerable in terms of the access latency and/or endurance cycles, and thus studies on NVM usually build hybrid memory architectures consisting of DRAM and NVM to solve the write vulnerability of NVM with a small amount of DRAM.…”

Section: A Non-volatile Memory Technologiesmentioning

confidence: 99%

Characterization of Android Memory References and Implication to Hybrid Memory Management

Lee

Bahn

2021

IEEE Access

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In this article, we analyze Android applications' memory reference behaviors, and observe that smartphone memory accesses are different from traditional computer systems with respect to the following five aspects. 1) A limited number of hot pages account for a majority of memory writes, and these hot pages have similar logical addresses regardless of application types. 2) The identities of these hot pages are shared library, linker, and stack regions. 3) The memory access behaviors of hot pages do not change significantly as time progresses even after applications finish their launching. 4) The skewness of memory write accesses in Android is extremely stronger than that of desktop systems. 5) In predicting rereference likelihood of hot pages, temporal locality is better than reference frequency. Based on these observations, we present a new smartphone memory management scheme for DRAM-NVM hybrid memory. Adopting NVM is effective in power-saving of smartphones, but NVM has weaknesses in write operations. Thus, we aim to identify write-intensive pages and place them on DRAM. Unlike previous studies, we prevent migration of pages between DRAM and NVM, which eliminates unnecessary NVM write traffic that accounts for 32-42% of total write traffic. By judiciously managing the admission of hot pages in DRAM, our scheme reduces the write traffic to NVM by 42% on average without performance degradations.

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“…As traditional buffer cache uses volatile DRAM, the file system may enter an inconsistent and/or out-of-date state when the system crashes before the changes are reflected to permanent storage. To overcome this problem, modern file systems adopt journaling or copy-onwrite transaction mechanisms that prevent data corruption via out-of-place updates through periodic commits [16,17]. Table I summarizes consistency support policies of various file systems.…”

Section: A File System Consistencymentioning

confidence: 99%